Review Board 2.0.15


All Review Requests

Summary Submitter
Posted Last Updated
arch, arm: Preserve TLB bootUncacheability when switching CPUs
ahansson
April 23rd, 2014, 12:22 p.m.
cpu: add more instruction mix statistics
ahansson
April 23rd, 2014, 12:21 p.m.
mem: Squash prefetch requests from downstream caches
ahansson
April 23rd, 2014, 12:21 p.m.
stats: Method stats source
ahansson
April 23rd, 2014, 12:21 p.m.
cpu, arm: Allow the specification of a socket field
ahansson
April 23rd, 2014, 12:20 p.m.
mem: Auto-generate CommMonitor trace file names
ahansson
April 23rd, 2014, 12:19 p.m.
arm: Panics in miscreg read functions can be tripped by O3 model
ahansson
April 23rd, 2014, 12:19 p.m.
dev: Set HDLCD default pixel clock for 1080p @ 60Hz
ahansson
April 23rd, 2014, 12:18 p.m.
arm: quick hack to allow a greater number of CPUs to a guest OS
ahansson
April 23rd, 2014, 12:16 p.m.
arm: Add Makefile for aarch64 build of util/m5
ahansson
April 23rd, 2014, 12:15 p.m.
arch: remove inline specifiers on all inst constrs, all ISAs
ahansson
April 23rd, 2014, 12:14 p.m.
arm: cleanup ARM ISA definition
ahansson
April 23rd, 2014, 12:13 p.m.
arm: remove the inline specifiers on the instruction constructors
ahansson
April 23rd, 2014, 12:12 p.m.
ext: disable PLY debugging
ahansson
April 23rd, 2014, 12:11 p.m.
scons: remove vector typemaps obsoleted by SWIG 2.0.4
ahansson
April 23rd, 2014, 12:11 p.m.
scons: update SCons SWIG version check to 2.0.4
ahansson
April 23rd, 2014, 12:10 p.m.
[Discarded] arch: support dynamic ISA file generation in per-ISA SConscripts
ahansson
April 23rd, 2014, 12:23 p.m.
[Discarded] arch: support dynamic ISA file generation in SConscripts
ahansson
April 23rd, 2014, 12:23 p.m.
arm: set default kernels for VExpress_EMM and VExpress_EMM64
atgutier
February 26th, 2014, 3:50 p.m.
ruby: cluster topology config fix
musleh
April 10th, 2014, 2:31 a.m.
o3: Fix occupancy checks for SMT
sleimanf
March 4th, 2014, 9:11 p.m.
ruby: recorder: Fix (de-)serializing with different cache block-sizes
melver
April 3rd, 2014, 6:40 p.m.
Compile gem5 on systems where python2 and python3 co-exists
hvatum
March 11th, 2014, 10:08 a.m.
configs: add num-work-ids command line option
gedare
March 7th, 2014, 3:28 p.m.
mem: per-thread cache occupancy and per-block ages
ali
November 14th, 2013, 9:09 p.m.
mem: Remove explict cast from memhelper.
ali
November 30th, 2013, 11:45 p.m.
sim: Add openat/fstatat syscalls and fix mremap
ali
November 30th, 2013, 11:34 p.m.
mem: Add support for a security bit in the memory system
ali
November 30th, 2013, 11:37 p.m.
cpu: Add support for Memory+Barrier instruction types in O3 cpu.
ali
November 30th, 2013, 11:39 p.m.
cpu: Add support for instructions that zero cache lines.
ali
November 30th, 2013, 11:51 p.m.
cpu: Add CPU support for generatig wake up events when LLSC adresses are snooped.
ali
November 30th, 2013, 11:49 p.m.
cache: Fix issue where IO cache read, prefetch and dirty data in L1 cause coherence bug.
ali
March 26th, 2013, 1:54 p.m.
Cache: Collect very basic stats on tag and data accesses
ali
November 14th, 2013, 9:08 p.m.
base: add support for probe points and common probes
ali
November 14th, 2013, 9:08 p.m.
arch, cpu: Add support for flattening misc register indexes.
ali
December 1st, 2013, midnight
kvm: Add support for multicore simulation
andysan
March 6th, 2014, 12:29 p.m.
dev: Protect PollEvent processing when running in parallel mode
andysan
April 3rd, 2014, 12:45 p.m.
mem: model data array bank in classic cache
rioshering
March 31st, 2013, 3:47 p.m.
ruby: slicc: change enqueue statement
nilay
April 1st, 2014, 2:24 p.m.
[Discarded] ARM: don't set cache fields of CTR reg if there are no caches
atgutier
August 7th, 2012, 12:13 p.m.
[Discarded] arm: add makefile for m5 utility for ARMv8
atgutier
March 18th, 2014, 9:10 p.m.
sim: Add the ability to lock and migrate between event queues
andysan
March 6th, 2014, 12:28 p.m.
ext: add McPAT source
atgutier
September 20th, 2013, 1:34 a.m.
arm: fix some typos in makefile for ARM m5 util and link statically
atgutier
March 18th, 2014, 9:30 p.m.
config: set drive_sys.clk_domain.voltage_domain
atgutier
February 27th, 2014, 3:52 a.m.
o3cpu: lsq: Fix TSO implementation
melver
March 5th, 2014, 5:05 p.m.
[Discarded] mem: fix retry bug in simple dram
aminfar
March 11th, 2014, 1:04 a.m.
cpu: DRAM Traffic Generator
ahansson
March 7th, 2014, 11:37 p.m.
mem: Add close adaptive paging policy to DRAM controller model
ahansson
March 7th, 2014, 11:44 p.m.
mem: More descriptive address-mapping scheme names
ahansson
March 7th, 2014, 11:35 p.m.
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