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[Discarded] gem5: Add the ability to create SimPoint BBV profiles
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mhayenga
|
October 19th, 2012, 2:46 p.m.
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[Discarded] gem5: Add the ability to create SimPoint BBV profiles
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mhayenga
|
October 19th, 2012, 3:03 p.m.
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[Submitted] mem: Make LL/SC locks fine grained
|
mhayenga
|
November 20th, 2012, 3:36 p.m.
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[Discarded] ruby: Add fine grained LL/SC to ruby
|
mhayenga
|
November 20th, 2012, 7:50 p.m.
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[Submitted] mem: Fix remaining use after free issue in simple_mem
|
mhayenga
|
November 21st, 2012, 5:43 p.m.
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[Submitted] sim: Add access syscall for ARM SE
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mhayenga
|
December 18th, 2012, 9:53 a.m.
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[Submitted] mem: Fix cache latency bug
|
mhayenga
|
March 23rd, 2013, 2:30 p.m.
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cpu: discard nops at decode in o3
|
mhayenga
|
March 29th, 2013, 7:27 p.m.
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arm: mark IT instructions as nops
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mhayenga
|
March 29th, 2013, 7:41 p.m.
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[Submitted] mem: Fix bugs in the PageTable cache that allow accessing uninitialized data
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mhayenga
|
April 20th, 2013, 12:17 a.m.
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[Submitted] base: Fix race condition in the socket listen function
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mhayenga
|
September 6th, 2013, 5:29 p.m.
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[Submitted] arm: Enable umask syscall in SE mode
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mhayenga
|
September 6th, 2013, 5:30 p.m.
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[Submitted] mem: Extend prefetcher with options and to work on non-block aligned addresses (prefetcher patch #1)
|
mhayenga
|
September 6th, 2013, 5:34 p.m.
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[Submitted] mem: Allow tagged prefetching for instruction fetches on stride prefetcher (prefetcher patch #2)
|
mhayenga
|
September 6th, 2013, 5:36 p.m.
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[Submitted] mem: Add additional tolerance to stride prefetcher (prefetcher patch #3)
|
mhayenga
|
September 6th, 2013, 5:38 p.m.
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