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[Submitted] config: Add a system clock command-line option
|
ahansson
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May 24th, 2013, 3:28 a.m.
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[Submitted] config: Remove Clock parameter multiplication
|
ahansson
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June 11th, 2013, 9:31 a.m.
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[Submitted] util: Add ini string as tooltip info in dot output
|
ahansson
|
August 19th, 2013, 9:33 a.m.
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[Submitted] mem: Fix DRAM bank occupancy for streaming access
|
ahansson
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October 16th, 2013, 7:39 a.m.
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[Submitted] mem: Add a wrapped DRAMSim2 memory controller
|
ahansson
|
November 14th, 2013, 6:24 p.m.
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[Submitted] ruby: Move Ruby debug flags to ruby dir and remove stale options
|
ahansson
|
March 16th, 2014, 12:55 p.m.
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[Submitted] arm: add preliminary ISA splits for ARM arch
|
ahansson
|
April 23rd, 2014, 12:24 p.m.
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[Submitted] mem: Add bank and rank indices as fields to the DRAM bank
|
ahansson
|
June 3rd, 2014, 4:33 p.m.
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[Submitted] config: Add SubSystem container for simobjects
|
ahansson
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July 28th, 2014, 5:50 a.m.
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[Submitted] misc: README direct to website for dependencies
|
ahansson
|
August 17th, 2014, 10:46 a.m.
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[Submitted] dev: Add a VirtIO block device model
|
ahansson
|
September 10th, 2014, 7:52 a.m.
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[Submitted] arch: Use shared_ptr for all Faults
|
ahansson
|
September 29th, 2014, 10:40 a.m.
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[Submitted] mem: Add a GDDR5 DRAM config
|
ahansson
|
November 17th, 2014, 6:13 a.m.
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[Submitted] mem: Clean up Request initialisation
|
ahansson
|
January 5th, 2015, 4:35 p.m.
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[Submitted] sim: Move the BaseTLB to src/arch/generic/
|
ahansson
|
February 5th, 2015, 10:59 a.m.
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|
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[Submitted] mem: Add option to force in-order insertion in PacketQueue
|
ahansson
|
February 19th, 2015, 7:56 a.m.
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|
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[Submitted] mem: Remove redundant allocateUncachedReadBuffer in cache
|
ahansson
|
March 17th, 2015, 7:09 p.m.
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[Submitted] Ruby: Remove the physMemPort and instead access memory directly
|
ahansson
|
March 20th, 2012, 8:31 a.m.
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[Submitted] Bus: Turn the PortId into a transport function parameter
|
ahansson
|
May 23rd, 2012, 6:34 a.m.
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[Submitted] mem: Add PacketInfo to be used for packet probe points
|
ahansson
|
September 25th, 2015, 2:29 p.m.
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[Submitted] Port: Make getAddrRanges const
|
ahansson
|
June 6th, 2012, 9:45 a.m.
|
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[Submitted] mem: Be less conservative in clearing load locks in the cache
|
ahansson
|
January 21st, 2016, 6:12 p.m.
|
|
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|
[Submitted] dev: Make default clock more reasonable for system and devices
|
ahansson
|
October 23rd, 2012, 2:28 a.m.
|
|
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[Submitted] mem: Add DDR3 and LPDDR2 DRAM controller configurations
|
ahansson
|
December 6th, 2012, 8:31 p.m.
|
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|
|
[Submitted] alpha: Remove ALPHA tru64 support and associated tests
|
ahansson
|
October 27th, 2016, 7:45 a.m.
|
|
|
|
[Submitted] mem: Adding verbose debug output in the memory system
|
ahansson
|
March 14th, 2013, 7:05 a.m.
|
|
|
|
[Submitted] mem: Align cache timing to clock edges
|
ahansson
|
June 4th, 2013, 10:46 a.m.
|
|
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|
[Submitted] power: Add voltage domains to the clock domains
|
ahansson
|
June 27th, 2013, 4:40 p.m.
|
|
|
|
[Submitted] mem: Use STL deque in favour of list for DRAM queues
|
ahansson
|
July 18th, 2013, 12:59 p.m.
|
|
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|
[Submitted] mem: Fix bug in PhysicalMemory use of mmap and munmap
|
ahansson
|
February 13th, 2014, 2:41 p.m.
|
|
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|
[Submitted] mem: Limit the accesses to a page before forcing a precharge
|
ahansson
|
March 7th, 2014, 11:40 p.m.
|
|
|
|
[Submitted] ext: disable PLY debugging
|
ahansson
|
April 23rd, 2014, 12:11 p.m.
|
|
|
|
[Submitted] mem: Add tWR to DRAM activate and precharge constraints
|
ahansson
|
April 23rd, 2014, 12:34 p.m.
|
|
|
|
[Submitted] style: Add support for a style ignore list and ignore ext/
|
ahansson
|
August 13th, 2014, 12:51 p.m.
|
|
|
|
[Submitted] alpha: Stop using 'inorder' and rely entirely on 'minor'
|
ahansson
|
August 23rd, 2014, 5:08 a.m.
|
|
|
|
[Submitted] mem: Add access statistics for the snoop filter
|
ahansson
|
September 10th, 2014, 7:54 a.m.
|
|
|
|
[Submitted] scons: Add --without-tcmalloc build option
|
ahansson
|
September 29th, 2014, 10:37 a.m.
|
|
|
|
[Submitted] cpu, o3: Ignored invalidate causing same-address load reordering
|
ahansson
|
November 17th, 2014, 6:18 a.m.
|
|
|
|
[Submitted] scons: Ensure dictionary iteration is sorted by key
|
ahansson
|
November 25th, 2014, 9:49 a.m.
|
|
|
|
[Submitted] mem: Add stack distance statistics to the CommMonitor
|
ahansson
|
December 12th, 2014, 5:46 p.m.
|
|
|
|
[Submitted] config: Adjust DRAM channel interleaving defaults
|
ahansson
|
January 21st, 2015, 1:22 p.m.
|
|
|
|
[Submitted] CPU: Round-two unifying instr/data CPU ports across models
|
ahansson
|
February 14th, 2012, 10:34 a.m.
|
|
|
|
[Submitted] Scons: Remove Werror=False in SConscript files
|
ahansson
|
March 6th, 2012, 9:18 a.m.
|
|
|
|
[Submitted] mem: Add explicit Cache subclass and make BaseCache abstract
|
ahansson
|
August 13th, 2015, 8:31 p.m.
|
|
|
|
[Submitted] mem: Order packet queue only on matching addresses
|
ahansson
|
October 13th, 2015, 3:36 p.m.
|
|
|
|
[Submitted] scons: Add LIBRARY_PATH from the user environment to Scons
|
ahansson
|
July 11th, 2012, 4 a.m.
|
|
|
|
[Submitted] mem: Align cache behaviour in atomic when upstream is responding
|
ahansson
|
January 1st, 2016, 2:16 p.m.
|
|
|
|
[Submitted] Inet: Remove the SackRange and its use
|
ahansson
|
August 29th, 2012, 11:53 a.m.
|
|
|
|
[Submitted] Mem: Add a maximum bandwidth to SimpleMemory
|
ahansson
|
September 12th, 2012, 9:38 a.m.
|
|
|
|
[Submitted] mem: Tidy up bus addr range debug messages
|
ahansson
|
November 1st, 2012, 1:49 a.m.
|
|
