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[Discarded] Ruby: Change DataBlock status to allocated after assigning an allocated pointer
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powerjg
|
August 22nd, 2012, 9:14 a.m.
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[Submitted] RubyPort and Sequencer: Fix draining
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jthestness
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August 31st, 2012, 4:48 p.m.
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[Submitted] Regression: Set the clock for twosys-tsunami CPUs
|
ahansson
|
September 21st, 2012, 9:54 a.m.
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[Submitted] Configs: SE Script Fix for Alpha+Ruby Simulations.
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musleh
|
September 25th, 2012, 11:40 a.m.
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[Submitted] Statistics: Add a function to configure periodic stats dumping
|
ali
|
September 7th, 2012, 12:24 p.m.
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[Submitted] Cache: add a response latency to the caches
|
ali
|
September 7th, 2012, 12:25 p.m.
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[Submitted] base: Check for static_assert support and provide fallback
|
ali
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September 7th, 2012, 12:23 p.m.
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[Submitted] arm: Use a static_assert to test that miscRegName[] is complete
|
ali
|
September 7th, 2012, 12:24 p.m.
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[Submitted] sim: Remove SimObject::setMemoryMode
|
ali
|
September 7th, 2012, 12:23 p.m.
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[Submitted] ARM: Squash outstanding walks when instructions are squashed.
|
ali
|
September 7th, 2012, 12:24 p.m.
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[Submitted] gem5: Update the README file to be a bit less out-of-date.
|
ali
|
September 7th, 2012, 12:21 p.m.
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[Submitted] build: Add missing dependencies when building param SWIG interfaces
|
ali
|
September 7th, 2012, 12:20 p.m.
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[Submitted] mem: Add a gasket that allows memory ranges to be re-mapped.
|
ali
|
August 16th, 2012, 1:26 p.m.
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[Submitted] Util: Added script to semantically diff two config.ini files
|
ali
|
September 7th, 2012, 12:24 p.m.
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[Submitted] CPU: Add abandoned instructions to O3 Pipe Viewer
|
ali
|
September 7th, 2012, 12:22 p.m.
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[Submitted] ARM: Predict target of more instructions that modify PC.
|
ali
|
August 29th, 2012, 11:35 a.m.
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[Submitted] ruby: move functional access to ruby system
|
nilay
|
September 24th, 2012, 5:55 p.m.
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[Submitted] ruby: remove some unused things in slicc
|
nilay
|
September 24th, 2012, 5:58 p.m.
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[Submitted] ruby: changes to simple network
|
nilay
|
September 24th, 2012, 6:08 p.m.
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[Submitted] ruby: rename template_hack to template
|
nilay
|
September 24th, 2012, 6:06 p.m.
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[Submitted] ruby: makes some members non-static
|
nilay
|
September 24th, 2012, 6:11 p.m.
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[Submitted] ruby: remove unused code in protocols
|
nilay
|
September 24th, 2012, 6:04 p.m.
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[Discarded] Ruby: Add Ruby Stats Hit/Miss Profile Access for MESI/MOESI Protocols
|
musleh
|
October 7th, 2012, 12:58 p.m.
|
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[Submitted] Doxygen: Update the version of the Doxyfile
|
ahansson
|
September 28th, 2012, 9:56 a.m.
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[Submitted] Mem: Determine bus block size during initialisation
|
ahansson
|
September 21st, 2012, 9:03 a.m.
|
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[Submitted] Regression: Use addTwoLevelCacheHierarchy in configs
|
ahansson
|
September 27th, 2012, 6:28 a.m.
|
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[Submitted] Regression: Use CPU clock and 32-byte width for L1-L2 bus
|
ahansson
|
September 27th, 2012, 6:30 a.m.
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[Submitted] Configs: Set the memtest clock to a reasonable value
|
ahansson
|
September 28th, 2012, 6:17 a.m.
|
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[Submitted] Mem: Use cycles to express cache-related latencies
|
ahansson
|
September 28th, 2012, 7 a.m.
|
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[Submitted] Clock: Inherit the clock from parent by default
|
ahansson
|
September 21st, 2012, 9:06 a.m.
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[Submitted] Param: Fix proxy traversal to support chained proxies
|
ahansson
|
September 21st, 2012, 9:05 a.m.
|
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[Submitted] Fix: Address a few minor issues identified by cppcheck
|
ahansson
|
October 12th, 2012, 1:38 a.m.
|
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[Submitted] Mem: Use deque instead of list for bus retries
|
ahansson
|
October 12th, 2012, 1:41 a.m.
|
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[Submitted] Mem: Use range operations in bus in preparation for striping
|
ahansson
|
September 21st, 2012, 9 a.m.
|
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[Submitted] Port: Add protocol-agnostic ports in the port hierarchy
|
ahansson
|
June 17th, 2012, 10:16 a.m.
|
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[Submitted] Checkpoint: Make system serialize call children
|
ahansson
|
October 12th, 2012, 1:46 a.m.
|
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[Submitted] Mem: Separate the host and guest views of memory backing store
|
ahansson
|
September 11th, 2012, 11:20 a.m.
|
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[Submitted] ruby: improved support for functional accesses
|
nilay
|
September 24th, 2012, 6:15 p.m.
|
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[Submitted] ruby: register multiple memory controllers
|
nilay
|
October 3rd, 2012, 9:06 p.m.
|
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[Submitted] ruby: reset timing after cache warm up
|
nilay
|
September 24th, 2012, 5:52 p.m.
|
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[Submitted] ruby: remove AbstractMemOrCache
|
nilay
|
October 3rd, 2012, 9:03 p.m.
|
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[Submitted] memtest: move check on outstanding requests
|
nilay
|
October 3rd, 2012, 9:10 p.m.
|
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[Submitted] ruby: allow function definition in slicc structs
|
nilay
|
September 24th, 2012, 6:02 p.m.
|
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[Submitted] ruby banked array: do away with event scheduling
|
nilay
|
September 13th, 2012, 7:58 a.m.
|
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[Discarded] gem5: Add the ability to create SimPoint BBV profiles
|
mhayenga
|
October 19th, 2012, 2:46 p.m.
|
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[Submitted] dev: Remove zero-time loop in DMA timing send
|
ahansson
|
October 19th, 2012, 2:29 a.m.
|
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O3: Show per-stage aggregate statistics detailing the reasons for block/stall cycles
|
vilanova
|
October 23rd, 2012, 11:38 a.m.
|
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[Submitted] config: Use shared cache config for regressions
|
ahansson
|
October 24th, 2012, 7:13 a.m.
|
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[Submitted] arm: Use table walker clock that is inherited from CPU
|
ahansson
|
October 23rd, 2012, 2:25 a.m.
|
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[Submitted] config: Use SimpleDRAM in full-system, and with o3 and inorder
|
ahansson
|
October 20th, 2012, 8:44 a.m.
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