|
|
ruby: allows multiple instances of ruby to be invoked
|
bpotter
|
April 4th, 2016, 11:45 p.m.
|
|
|
|
ruby: Add ReadRespWithInvalidate support, fixes MESI consistency bug
|
melver
|
May 21st, 2015, 7:27 p.m.
|
|
|
|
ruby: add parameters to functions related to addresses
|
bpotter
|
April 4th, 2016, 11:40 p.m.
|
|
|
|
ruby: Add occupancy stats to MessageBuffers
|
jthestness
|
January 23rd, 2016, 8:59 p.m.
|
|
|
|
ruby: add newline to RubyNetwork DPRINTF
|
bpotter
|
April 4th, 2016, 11:33 p.m.
|
|
|
|
ruby: add new rule to grammer to handle new'd objects with parameters
|
bpotter
|
April 4th, 2016, 11:42 p.m.
|
|
|
|
ruby: add L0Cache machine type to MachType enum
|
bpotter
|
April 4th, 2016, 11:44 p.m.
|
|
|
|
Ruby: Add Flushing Support to MOESI CMP directory Protocol
|
musleh
|
December 2nd, 2012, 5:32 p.m.
|
|
|
|
ruby: add block_size_bits to the testAnd* functions
|
bpotter
|
April 4th, 2016, 11:40 p.m.
|
|
|
|
ruby: add a couple of members to ruby objects to remove statics
|
bpotter
|
April 4th, 2016, 11:40 p.m.
|
|
|
|
ruby: PerfectCache changes so that we can create with new
|
bpotter
|
April 4th, 2016, 11:42 p.m.
|
|
|
|
ruby/slicc: enable DPRINTFN calls in slicc for temporary debug printing
|
jalsop
|
December 4th, 2015, 11:52 p.m.
|
|
|
|
Require the SPARC FS image to be specified on the command line
|
jermar
|
June 13th, 2016, 8:27 a.m.
|
|
|
|
Regressions: Start of new regression system
|
ali
|
August 30th, 2011, 10:38 a.m.
|
|
|
|
regression tester: add tests to exercise m5threads with the x86 ISA.
|
marc.orr
|
May 20th, 2012, 6:38 p.m.
|
|
|
|
regression tester: add tests to exercise m5threads with the x86 ISA.
|
marc.orr
|
May 16th, 2012, 8:34 p.m.
|
|
|
|
python: Adding event queue empty check after instantiation before startup
|
cdirik
|
December 4th, 2014, 6:45 p.m.
|
|
|
|
Provide Python script command line options to set cache latencies
|
vilanova
|
September 28th, 2012, 8:52 a.m.
|
|
|
|
Prefetch: Do not prefetch on cache & MSHR misses
|
cocoppang
|
September 1st, 2016, 12:10 p.m.
|
|
|
|
Port: Separate the port and the interface protocol
|
ahansson
|
July 10th, 2012, 4:07 a.m.
|
|
|
|
Paths: Clean up how paths are processed in M5.
|
gblack
|
February 23rd, 2011, 2:18 a.m.
|
|
|
|
Old Path Diff for gabe
|
nate
|
February 23rd, 2011, 11 a.m.
|
|
|
|
O3CPU: Revive cachePorts per-cycle dcache access limit
|
erik.t
|
May 17th, 2013, 3:53 a.m.
|
|
|
|
O3: Show per-stage aggregate statistics detailing the reasons for block/stall cycles
|
vilanova
|
October 23rd, 2012, 11:38 a.m.
|
|
|
|
O3: Removed unnecessary unserialize instruction flags.
|
yxw0985
|
May 13th, 2011, 2:31 p.m.
|
|
|
|
o3: issue excl. prefetch as soon as store address is available
|
stever
|
May 14th, 2014, 5:47 a.m.
|
|
|
|
o3: Fix starvation issue in Round Robin SMT commit policy
|
sleimanf
|
March 4th, 2014, 10 p.m.
|
|
|
|
mthreads regression: Add some more configurations to be tested with m5threads.
|
marc.orr
|
May 20th, 2012, 6:38 p.m.
|
|
|
|
Models the request and response bandwidth between O3 and L1 (cache read and write ports)
|
aminfar
|
September 14th, 2012, 5:58 p.m.
|
|
|
|
misc: Add support for switching multiple cores in SystemC
|
prosenfeld
|
March 4th, 2016, 11:28 p.m.
|
|
|
|
MIPS: The full patch of MIPS_FS
|
guody
|
January 12th, 2012, 11:22 a.m.
|
|
|
|
MIPS: move the CP0 config code to isa.cc
|
guody
|
January 16th, 2012, 7:25 a.m.
|
|
|
|
mips: linked load instruction problem
|
guody
|
June 21st, 2011, 6:54 p.m.
|
|
|
|
MIPS: get the correct value of Asid in TLB
|
guody
|
January 16th, 2012, 7:58 a.m.
|
|
|
|
MIPS: fix several instructions related to FS in decoder.isa
|
guody
|
January 16th, 2012, 8:56 a.m.
|
|
|
|
mips: add support for branch likely instruction
|
guody
|
June 20th, 2011, 3:21 a.m.
|
|
|
|
MIPS: add a head file for stacktrace.cc
|
guody
|
January 16th, 2012, 8:47 a.m.
|
|
|
|
mem: [DRAFT] Make DRAMCtrl response queue finite
|
jthestness
|
February 8th, 2016, 7:58 p.m.
|
|
|
|
mem: Trigger DRAMCtrl resp queue panic
|
jthestness
|
February 2nd, 2016, 1:08 a.m.
|
|
|
|
mem: Reflect that packet address and size are always valid
|
ahansson
|
August 19th, 2015, 9:06 a.m.
|
|
|
|
mem: MSHR livelock bug fix
|
atgutier
|
May 11th, 2015, 10:19 p.m.
|
|
|
|
mem: model data array bank in classic cache
|
rioshering
|
March 31st, 2013, 3:47 p.m.
|
|
|
|
mem: implement x86 locked accesses in timing-mode classic cache
|
stever
|
March 14th, 2015, 5:19 p.m.
|
|
|
|
mem: Implement alternative flow control between MemObject ports
|
mporemba
|
February 29th, 2016, 6:50 p.m.
|
|
|
|
mem: Deprecate old unsafe Packet::(get|set)() methods
|
andysan
|
July 7th, 2015, 5:07 p.m.
|
|
|
|
mem: Allow non-invalidating uncacheable snoops
|
eclark
|
December 19th, 2016, 7:39 p.m.
|
|
|
|
mem: Add unified queue to DRAMCtrl
|
mporemba
|
February 29th, 2016, 6:50 p.m.
|
|
|
|
mem: add retry mechanism for cache fills in classic cache model
|
rioshering
|
April 17th, 2013, 11:18 a.m.
|
|
|
|
mem: add a knob to turn on/off bank blocking model
|
rioshering
|
April 15th, 2013, 11:54 a.m.
|
|
|
|
Make TRIPS binaries available
|
pengfeidaxia
|
April 28th, 2010, 6:37 p.m.
|
|