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[Submitted] Ruby: Add infrastructure for recording cache contents
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nilay
|
January 3rd, 2012, 4:33 p.m.
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[Submitted] ruby: add functions for computing next stride/page address
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nilay
|
October 24th, 2012, 12:37 p.m.
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[Submitted] ruby: add a three level MESI protocol.
|
nilay
|
January 1st, 2014, 6:52 p.m.
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[Submitted] ruby: add a prefetcher
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nilay
|
October 24th, 2012, 12:37 p.m.
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[Submitted] ruby: abstract controller: mark some variables as const
|
nilay
|
September 12th, 2015, 9:42 p.m.
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[Submitted] Ruby X86: problem in setting DMA port, related to the changeset 8850
|
nilay
|
March 14th, 2012, 8:53 p.m.
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[Submitted] Ruby System: Convert to Clocked Object
|
nilay
|
August 30th, 2012, 8:14 a.m.
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[Submitted] Ruby Sparse Memory: Add function for collating blocks
|
nilay
|
January 3rd, 2012, 4:37 p.m.
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[Submitted] Ruby Slicc: remove the call to cin.get() function
|
nilay
|
September 10th, 2012, 8:34 a.m.
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[Submitted] Ruby Set: Move NUMBER_WORDS_PER_SET to Set.hh
|
nilay
|
January 3rd, 2012, 4:11 p.m.
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[Submitted] Ruby Port: Add a list of cpu ports attached to this port
|
nilay
|
January 3rd, 2012, 4:40 p.m.
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[Submitted] Ruby Memory Vector: Functions for collating and populating pages
|
nilay
|
January 3rd, 2012, 4:20 p.m.
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[Submitted] Ruby Memory Vector: Allow more than 4GB of memory
|
nilay
|
August 25th, 2012, 1:56 p.m.
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[Submitted] Ruby EventQueue: Remove unused functions
|
nilay
|
January 3rd, 2012, 4:39 p.m.
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[Submitted] Ruby Cache: Add param for marking caches as instruction only
|
nilay
|
January 3rd, 2012, 4:17 p.m.
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[Submitted] ruby banked array: do away with event scheduling
|
nilay
|
September 13th, 2012, 7:58 a.m.
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[Submitted] Replace WARN and ERROR statements in Ruby
|
nilay
|
December 2nd, 2010, 1:14 p.m.
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[Submitted] Reorder Cache Lookup in Protocol Files
|
nilay
|
January 25th, 2011, 9:18 a.m.
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[Submitted] Regression: Add a test for x86 timing full system ruby simulation
|
nilay
|
December 30th, 2011, 4:27 p.m.
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[Submitted] o3: drop unused statistic wbPenalized and wbPenalizedRate
|
nilay
|
September 13th, 2015, 5:39 p.m.
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[Submitted] O3, Ruby: Forward invalidations from Ruby to O3 CPU
|
nilay
|
October 17th, 2011, 11:23 p.m.
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[Submitted] O3 LSQ: Implement TSO
|
nilay
|
November 15th, 2011, 6:59 a.m.
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[Submitted] O3 Fetch: Check if PC is pointing to Microcode ROM
|
nilay
|
January 18th, 2012, 9:57 a.m.
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[Submitted] O3 CPU: Strengthen condition for handling interrupts
|
nilay
|
January 28th, 2012, 9:01 p.m.
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[Discarded] O3 CPU: Remove interruptPending from fetch
|
nilay
|
December 30th, 2011, 4:30 p.m.
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[Submitted] O3 CPU: Provide the squashing instruction
|
nilay
|
January 18th, 2012, 10:06 a.m.
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[Submitted] O3 CPU: Improve handling of delayed commit flag
|
nilay
|
January 28th, 2012, 9:02 p.m.
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[Discarded] O3 CPU: Add a boolean flag for instruction midway in execution
|
nilay
|
December 30th, 2011, 4:37 p.m.
|
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[Submitted] NDEBUG for Ruby Assert statement
|
nilay
|
December 2nd, 2010, 1:23 p.m.
|
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[Submitted] Moving Ruby to M5's debug print support
|
nilay
|
October 17th, 2010, 2:22 p.m.
|
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[Submitted] MOESI Hammer: Remove a couple of errors
|
nilay
|
December 30th, 2011, 3:57 p.m.
|
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[Submitted] MESI: Add queues for stalled requests
|
nilay
|
December 2nd, 2010, 3:58 a.m.
|
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[Submitted] MESI Coherence Protocol: Fix L2 miss statistics
|
nilay
|
December 30th, 2011, 3:48 p.m.
|
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[Submitted] MESI Coherence Protocol: Add calls for profiling misses
|
nilay
|
November 1st, 2011, 10:29 p.m.
|
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[Submitted] memtest: move check on outstanding requests
|
nilay
|
October 3rd, 2012, 9:10 p.m.
|
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[Submitted] MemCmd: Add a command for invalidation requests to LSQ
|
nilay
|
January 13th, 2012, 3:58 a.m.
|
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[Submitted] mem: packet: Add const to constructor argument
|
nilay
|
June 29th, 2015, 6:18 a.m.
|
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[Discarded] mem: dram ctrl: correct errors due to busBusyUntil variable
|
nilay
|
October 28th, 2014, 3:19 a.m.
|
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|
[Submitted] mem: change the namespace Message to ProtoMessage
|
nilay
|
August 28th, 2014, 6 p.m.
|
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[Discarded] ISA Parser: runtime read, write conditions for registers
|
nilay
|
April 16th, 2012, 9:52 p.m.
|
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[Submitted] ISA Parser: Allow predication of source and destination registers
|
nilay
|
April 16th, 2012, 9:52 p.m.
|
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|
|
[Discarded] inorder cpu: remove params.hh
|
nilay
|
January 5th, 2013, 9:19 a.m.
|
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[Discarded] IDE Disk: Bring it inline with QEMU
|
nilay
|
October 10th, 2011, 5:54 p.m.
|
|
|
|
[Submitted] Hammer protocol: Change how data to copied from L1 to L2 cache and vice-versa
|
nilay
|
December 2nd, 2010, 11:01 a.m.
|
|
|
|
[Discarded] Fix x86 TLB and Walker
|
nilay
|
February 28th, 2012, 6:41 a.m.
|
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|
[Submitted] Fix x86 TLB and Walker
|
nilay
|
February 28th, 2012, 6:47 a.m.
|
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|
[Submitted] Fix switching of CPUs
|
nilay
|
February 28th, 2012, 6:40 a.m.
|
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|
[Discarded] Extend physical memory beyond 4GB
|
nilay
|
February 15th, 2012, 3:06 p.m.
|
|
|
|
[Submitted] ext: dsent: adds a Python interface, drops C++ one
|
nilay
|
September 18th, 2014, 9:27 p.m.
|
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|
|
[Submitted] ext: add the source code for DSENT
|
nilay
|
September 18th, 2014, 9:26 p.m.
|
|
