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[Submitted] cpu: Fix Checker register index use
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ahansson
|
November 5th, 2013, 4:34 p.m.
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[Submitted] config: Add hooks to enable new config sys
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ahansson
|
April 23rd, 2014, 12:22 p.m.
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[Submitted] base: Clean up redundant string functions and use C++11
|
ahansson
|
September 10th, 2014, 7:51 a.m.
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[Submitted] base: Transition CP annotate to use shared_ptr
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ahansson
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September 29th, 2014, 10:39 a.m.
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[Submitted] scons: Do not build the InOrderCPU
|
ahansson
|
December 19th, 2014, 1:20 p.m.
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[Submitted] mem: Fix initial value problem with MemChecker
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ahansson
|
February 3rd, 2015, 7:57 p.m.
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[Submitted] dev, arm: Clean up PL011 and rewrite interrupt handling
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ahansson
|
February 19th, 2015, 7:55 a.m.
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[Discarded] mem: Remove RubyMemoryControl and rely on DRAMCtrl
|
ahansson
|
April 2nd, 2015, 9:31 a.m.
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[Discarded] MEM: TranslatingPorts are replaced with SETranslatingProxys
|
ahansson
|
November 28th, 2011, 10:16 a.m.
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[Submitted] MEM: Removing the default port peer from Python ports
|
ahansson
|
December 23rd, 2011, 1:36 a.m.
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[Discarded] CPU: Fix switching in of x86 CPU with interrupt and TLB ports
|
ahansson
|
February 24th, 2012, 10:32 a.m.
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[Submitted] MEM: Add the PortId type and a corresponding id field to Port
|
ahansson
|
April 7th, 2012, 9:51 a.m.
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[Submitted] Cache: Remove dangling doWriteback declaration
|
ahansson
|
May 23rd, 2012, 6:30 a.m.
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[Submitted] Port: Move retry from port base class to Master/SlavePort
|
ahansson
|
June 6th, 2012, 9:40 a.m.
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[Submitted] mem: Explicitly check MSHR snoops for cases not dealt with
|
ahansson
|
December 9th, 2015, 11:54 p.m.
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[Submitted] Clock: Inherit the clock from parent by default
|
ahansson
|
September 21st, 2012, 9:06 a.m.
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[Submitted] dev: Remove zero-time loop in DMA timing send
|
ahansson
|
October 19th, 2012, 2:29 a.m.
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[Submitted] mem: Merge ranges that are part of the conf table
|
ahansson
|
December 6th, 2012, 8:16 p.m.
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[Submitted] config: Break out base options for usage with NULL ISA
|
ahansson
|
October 20th, 2016, 11:07 a.m.
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[Submitted] util: Add a utility script for decoding packet traces
|
ahansson
|
March 14th, 2013, 7:06 a.m.
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[Submitted] config: Update script to set cache line size on system
|
ahansson
|
July 12th, 2013, 3:07 p.m.
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[Submitted] mem: Adding stats for DRAM power calculation
|
ahansson
|
October 16th, 2013, 7:49 a.m.
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[Submitted] mem: DDR3 config for comparing with DRAMSim2
|
ahansson
|
March 7th, 2014, 11:36 p.m.
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[Submitted] mem: Make DRAM read/write switching less conservative
|
ahansson
|
April 23rd, 2014, 12:27 p.m.
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[Submitted] arm: support 16kb vm granules
|
ahansson
|
August 13th, 2014, 12:50 p.m.
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[Submitted] arm: Support >2GB of memory for AArch64 systems
|
ahansson
|
August 20th, 2014, 8:35 a.m.
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[Submitted] mem: Simple Snoop Filter
|
ahansson
|
September 10th, 2014, 7:53 a.m.
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[Submitted] scons: Warn for known gcc and swig incompatibilities
|
ahansson
|
September 29th, 2014, 10:36 a.m.
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[Submitted] sim: EventQueue wakeup on events scheduled outside the event loop
|
ahansson
|
September 29th, 2014, 10:45 a.m.
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[Submitted] mem: Cleanup Packet::checkFunctional and hasData usage
|
ahansson
|
November 17th, 2014, 6:16 a.m.
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[Submitted] arm: Merge ISA files with pseudo instructions
|
ahansson
|
December 12th, 2014, 5:45 p.m.
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[Submitted] MEM: Remove the otherPort from the cache ports
|
ahansson
|
January 18th, 2012, 2:33 a.m.
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[Submitted] Script: Fix the scripts that use the num_cpus cache parameter
|
ahansson
|
February 13th, 2012, 2:38 a.m.
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[Submitted] mem: Make caches way aware
|
ahansson
|
July 13th, 2015, 4:26 p.m.
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[Submitted] CPU: Unify initMemProxies across CPUs and simulation modes
|
ahansson
|
March 27th, 2012, 3:55 a.m.
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[Submitted] Bus: Split the bus into separate request/response layers
|
ahansson
|
June 11th, 2012, 6:56 a.m.
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[Submitted] EventManager: Rename queue accessor and remove cast operator
|
ahansson
|
July 6th, 2012, 6:37 a.m.
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[Submitted] CPU: Remove overloaded function_trace_start parameter
|
ahansson
|
August 3rd, 2012, 8:32 a.m.
|
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[Submitted] DRAM: Introduce SimpleDRAM to capture a high-level controller
|
ahansson
|
September 10th, 2012, 10:30 a.m.
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[Submitted] Regression: Use addTwoLevelCacheHierarchy in configs
|
ahansson
|
September 27th, 2012, 6:28 a.m.
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stats: Add documentation to the python statistics system
|
ahansson
|
January 15th, 2013, 10:24 a.m.
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[Submitted] mem: Change accessor function names to match the port interface
|
ahansson
|
February 14th, 2013, 1:53 a.m.
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[Submitted] base: Avoid size limitation on protobuf coded streams
|
ahansson
|
April 22nd, 2013, 2:43 p.m.
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[Submitted] mem: More descriptive DRAM config names
|
ahansson
|
May 14th, 2013, 12:45 a.m.
|
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[Submitted] test: Use SimpleMemory for atomic full-system tests
|
ahansson
|
October 17th, 2013, 5:31 p.m.
|
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[Submitted] cpu, arm: Allow the specification of a socket field
|
ahansson
|
April 23rd, 2014, 12:20 p.m.
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[Submitted] mem: write streaming support via WriteInvalidate promotion
|
ahansson
|
August 13th, 2014, 2:08 p.m.
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[Submitted] config: Cleanup .json config file generation
|
ahansson
|
September 10th, 2014, 7:50 a.m.
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[Submitted] cpu: Probe points for basic PMU stats
|
ahansson
|
September 29th, 2014, 10:38 a.m.
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[Submitted] mem: Hide WriteInvalidate requests from prefetchers
|
ahansson
|
December 12th, 2014, 5:50 p.m.
|
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