Review Board 2.0.15


All Review Requests

Summary Submitter
Posted
Last Updated
ruby: rename Addr to addr
nilay
June 25th, 2015, 8:15 a.m.
ruby: replace Address by Addr
nilay
June 25th, 2015, 8:16 a.m.
config: Update location of ruby topologies in help
dhashe
June 26th, 2015, 2:04 p.m.
mem: Convert Request static const flags to enums
ahansson
June 26th, 2015, 9:26 p.m.
mem: packet: Add const to constructor argument
nilay
June 29th, 2015, 6:18 a.m.
sim: make warning for absent optional parameters optional
cdunham
June 30th, 2015, 12:35 a.m.
sim: support checkpointing std::set<std::string>'s
cdunham
June 30th, 2015, 12:35 a.m.
sim: tag-based checkpoint versioning
cdunham
June 30th, 2015, 12:35 a.m.
[Discarded] mem: minor fixes in the HMC vault model
azarkhish
July 1st, 2015, 10:25 a.m.
[Discarded] mem: minor change in the XBar class
azarkhish
July 1st, 2015, 10:28 a.m.
[Discarded] mem: a simple HMC controller
azarkhish
July 1st, 2015, 10:31 a.m.
[Discarded] mem: a serial link model for the HMC
azarkhish
July 1st, 2015, 10:32 a.m.
[Discarded] config: composing a single HMC device
azarkhish
July 1st, 2015, 10:34 a.m.
[Discarded] config: testing and running the HMC device
azarkhish
July 1st, 2015, 10:37 a.m.
base: Declare a type for context IDs
andysan
July 7th, 2015, 2:34 p.m.
dev: Make serializtion in Sinic constant
andysan
July 7th, 2015, 2:35 p.m.
base: Rewrite the CircleBuf to fix bugs and add serialization
andysan
July 7th, 2015, 3:12 p.m.
sim: Split ClockedObject to make it usable to non-SimObjects
andysan
July 7th, 2015, 3:13 p.m.
dev: Add a simple DMA engine that can be used by devices
andysan
July 7th, 2015, 3:16 p.m.
arm: Add support for programmable oscillators
andysan
July 7th, 2015, 4 p.m.
mem: Cleanup packet accessor methods
andysan
July 7th, 2015, 4:57 p.m.
mem: Deprecate old unsafe Packet::(get|set)() methods
andysan
July 7th, 2015, 5:07 p.m.
dev, x86: Fix serialization bug in the i8042 device
andysan
July 8th, 2015, 12:36 p.m.
dev: Implement a simple display timing generator
andysan
July 8th, 2015, 12:44 p.m.
dev, arm: Rewrite the HDLCD controller
andysan
July 8th, 2015, 12:47 p.m.
ruby: Fix memWriteback() not to record auto-delete events
tmjones
July 8th, 2015, 8:32 p.m.
ruby: handle llsc accesses through CacheEntry, not CacheMemory
nilay
July 10th, 2015, 4:27 p.m.
ruby: drop the [] notation for lookup function.
nilay
July 10th, 2015, 4:28 p.m.
ruby: slicc: avoid duplicate code for function argument check
nilay
July 10th, 2015, 4:28 p.m.
ruby: slicc: use default argument value
nilay
July 10th, 2015, 4:29 p.m.
ruby: call setMRU from L1 controllers, not from sequencer
nilay
July 10th, 2015, 4:29 p.m.
mem: Tidy up packet
ahansson
July 13th, 2015, 3:15 p.m.
mem: Tidy up CacheBlk class
ahansson
July 13th, 2015, 3:15 p.m.
mem: Transition away from isSupplyExclusive for writebacks
ahansson
July 13th, 2015, 3:16 p.m.
mem: Remove unused RequestCause in cache
ahansson
July 13th, 2015, 3:17 p.m.
mem: Make caches way aware
ahansson
July 13th, 2015, 4:26 p.m.
rename System.{hh,cc} to RubySystem.{hh,cc}
dhashe
July 13th, 2015, 7 p.m.
syscall_emul: file descriptor interface changes
bpotter
July 14th, 2015, 5:30 a.m.
base: refactor process class (specifically FdMap and friends)
bpotter
July 14th, 2015, 5:31 a.m.
syscall_emul: standardized file descriptor name and add return checks.
bpotter
July 14th, 2015, 5:31 a.m.
style: change Process function calls to use camelCase
bpotter
July 14th, 2015, 5:31 a.m.
config: Fail if not using all L2 caches in ruby protocols
dhashe
July 14th, 2015, 2:53 p.m.
config: Add configs scripts used in Learning gem5
powerjg
July 16th, 2015, 2:12 p.m.
tests: Add tests for the Learning gem5 scripts
powerjg
July 16th, 2015, 2:12 p.m.
util: Enable DRAM sweep to print power and efficiency
ahansson
July 16th, 2015, 3:43 p.m.
cpu, o3: consider split requests for LSQ checksnoop operations
hongil
July 16th, 2015, 7:07 p.m.
ruby: dma sequencer: removes redundant code
bpotter
July 17th, 2015, 12:19 a.m.
ruby: Add missing block deallocations in MOESI_hammer
lena
July 18th, 2015, 9:20 p.m.
ruby: eliminate type uint64 and int64
nilay
July 19th, 2015, 11:41 p.m.
ruby: adds set and way indices to AbstractCacheEntry
nilay
July 19th, 2015, 11:42 p.m.
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