Review Board 2.0.15


All Review Requests

Summary Submitter Posted Last Updated
ruby: reset timing after cache warm up
nilay
September 24th, 2012, 5:52 p.m.
ruby: register multiple memory controllers
nilay
October 3rd, 2012, 9:06 p.m.
ruby: improved support for functional accesses
nilay
September 24th, 2012, 6:15 p.m.
Mem: Separate the host and guest views of memory backing store
ahansson
September 11th, 2012, 11:20 a.m.
Checkpoint: Make system serialize call children
ahansson
October 12th, 2012, 1:46 a.m.
Port: Add protocol-agnostic ports in the port hierarchy
ahansson
June 17th, 2012, 10:16 a.m.
Mem: Use range operations in bus in preparation for striping
ahansson
September 21st, 2012, 9 a.m.
Mem: Use deque instead of list for bus retries
ahansson
October 12th, 2012, 1:41 a.m.
Fix: Address a few minor issues identified by cppcheck
ahansson
October 12th, 2012, 1:38 a.m.
Param: Fix proxy traversal to support chained proxies
ahansson
September 21st, 2012, 9:05 a.m.
Clock: Inherit the clock from parent by default
ahansson
September 21st, 2012, 9:06 a.m.
Mem: Use cycles to express cache-related latencies
ahansson
September 28th, 2012, 7 a.m.
Configs: Set the memtest clock to a reasonable value
ahansson
September 28th, 2012, 6:17 a.m.
Regression: Use CPU clock and 32-byte width for L1-L2 bus
ahansson
September 27th, 2012, 6:30 a.m.
Regression: Use addTwoLevelCacheHierarchy in configs
ahansson
September 27th, 2012, 6:28 a.m.
Mem: Determine bus block size during initialisation
ahansson
September 21st, 2012, 9:03 a.m.
Doxygen: Update the version of the Doxyfile
ahansson
September 28th, 2012, 9:56 a.m.
[Discarded] Ruby: Add Ruby Stats Hit/Miss Profile Access for MESI/MOESI Protocols
musleh
October 7th, 2012, 12:58 p.m.
ruby: remove unused code in protocols
nilay
September 24th, 2012, 6:04 p.m.
ruby: makes some members non-static
nilay
September 24th, 2012, 6:11 p.m.
ruby: rename template_hack to template
nilay
September 24th, 2012, 6:06 p.m.
ruby: changes to simple network
nilay
September 24th, 2012, 6:08 p.m.
ruby: remove some unused things in slicc
nilay
September 24th, 2012, 5:58 p.m.
ruby: move functional access to ruby system
nilay
September 24th, 2012, 5:55 p.m.
ARM: Predict target of more instructions that modify PC.
ali
August 29th, 2012, 11:35 a.m.
CPU: Add abandoned instructions to O3 Pipe Viewer
ali
September 7th, 2012, 12:22 p.m.
Util: Added script to semantically diff two config.ini files
ali
September 7th, 2012, 12:24 p.m.
mem: Add a gasket that allows memory ranges to be re-mapped.
ali
August 16th, 2012, 1:26 p.m.
build: Add missing dependencies when building param SWIG interfaces
ali
September 7th, 2012, 12:20 p.m.
gem5: Update the README file to be a bit less out-of-date.
ali
September 7th, 2012, 12:21 p.m.
ARM: Squash outstanding walks when instructions are squashed.
ali
September 7th, 2012, 12:24 p.m.
sim: Remove SimObject::setMemoryMode
ali
September 7th, 2012, 12:23 p.m.
arm: Use a static_assert to test that miscRegName[] is complete
ali
September 7th, 2012, 12:24 p.m.
base: Check for static_assert support and provide fallback
ali
September 7th, 2012, 12:23 p.m.
Cache: add a response latency to the caches
ali
September 7th, 2012, 12:25 p.m.
Statistics: Add a function to configure periodic stats dumping
ali
September 7th, 2012, 12:24 p.m.
Configs: SE Script Fix for Alpha+Ruby Simulations.
musleh
September 25th, 2012, 11:40 a.m.
Regression: Set the clock for twosys-tsunami CPUs
ahansson
September 21st, 2012, 9:54 a.m.
RubyPort and Sequencer: Fix draining
jthestness
August 31st, 2012, 4:48 p.m.
[Discarded] Ruby: Change DataBlock status to allocated after assigning an allocated pointer
powerjg
August 22nd, 2012, 9:14 a.m.
Ruby: Modify Scons so that we can put .sm files in extras
powerjg
July 14th, 2012, 8:43 a.m.
Standard Switch: Drain the system before switching CPUs
jthestness
August 31st, 2012, 4:39 p.m.
Base CPU: Initialize profileEvent to NULL
jthestness
August 31st, 2012, 4:18 p.m.
se.py Ruby: Connect TLB walker ports
jthestness
August 31st, 2012, 4:36 p.m.
TrafficGen: Add a basic traffic generator
ahansson
August 24th, 2012, 11:11 a.m.
TrafficGen: Add a basic traffic generator regression
ahansson
August 24th, 2012, 11:20 a.m.
DRAM: Introduce SimpleDRAM to capture a high-level controller
ahansson
September 10th, 2012, 10:30 a.m.
Mem: Tidy up bus member variables types
ahansson
September 20th, 2012, 6:39 a.m.
Scons: Verbose messages when dependencies are not installed
ahansson
September 20th, 2012, 6:22 a.m.
Ignore FUTEX_PRIVATE_FLAG of sys_futex in SE mode
lluc.alvarez
September 20th, 2012, 8:52 a.m.
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