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[Submitted] MEM: Removing the default port peer from Python ports
|
ahansson
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December 23rd, 2011, 1:36 a.m.
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[Submitted] MEM: Make the bus default port yet another port
|
ahansson
|
December 23rd, 2011, 1:38 a.m.
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[Discarded] Simulation.py: Bug in setting switch_cpus
|
nilay
|
December 25th, 2011, 8:52 a.m.
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[Submitted] X86: Add memory fence to I/O instructions
|
nilay
|
December 30th, 2011, 3:37 p.m.
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[Submitted] MESI Coherence Protocol: Fix L2 miss statistics
|
nilay
|
December 30th, 2011, 3:48 p.m.
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[Submitted] Sparse Memory: Simplify the structure for an entry
|
nilay
|
December 30th, 2011, 3:51 p.m.
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[Submitted] MOESI Hammer: Remove a couple of errors
|
nilay
|
December 30th, 2011, 3:57 p.m.
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[Submitted] Regression: Add a test for x86 timing full system ruby simulation
|
nilay
|
December 30th, 2011, 4:27 p.m.
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[Discarded] O3 CPU: Remove interruptPending from fetch
|
nilay
|
December 30th, 2011, 4:30 p.m.
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[Discarded] O3 CPU: Add a boolean flag for instruction midway in execution
|
nilay
|
December 30th, 2011, 4:37 p.m.
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[Submitted] X86 TLB: Move a DPRINTF to its correct place
|
nilay
|
December 31st, 2011, 10:34 a.m.
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[Submitted] eventq: add a function for replacing head of the queue
|
nilay
|
January 3rd, 2012, 4:04 p.m.
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[Submitted] Ruby: remove the files related to the tracer
|
nilay
|
January 3rd, 2012, 4:07 p.m.
|
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[Submitted] Ruby Set: Move NUMBER_WORDS_PER_SET to Set.hh
|
nilay
|
January 3rd, 2012, 4:11 p.m.
|
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[Submitted] AbstractController: Remove some of the unused functions
|
nilay
|
January 3rd, 2012, 4:14 p.m.
|
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[Submitted] Ruby Cache: Add param for marking caches as instruction only
|
nilay
|
January 3rd, 2012, 4:17 p.m.
|
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[Submitted] Ruby Memory Vector: Functions for collating and populating pages
|
nilay
|
January 3rd, 2012, 4:20 p.m.
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[Submitted] Ruby: Add infrastructure for recording cache contents
|
nilay
|
January 3rd, 2012, 4:33 p.m.
|
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[Submitted] Ruby Sparse Memory: Add function for collating blocks
|
nilay
|
January 3rd, 2012, 4:37 p.m.
|
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[Submitted] Ruby EventQueue: Remove unused functions
|
nilay
|
January 3rd, 2012, 4:39 p.m.
|
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[Submitted] Ruby Port: Add a list of cpu ports attached to this port
|
nilay
|
January 3rd, 2012, 4:40 p.m.
|
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[Submitted] Config: Add support for restoring using a timing CPU
|
nilay
|
January 4th, 2012, 3:59 a.m.
|
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[Submitted] Config: Add an option of type 'choice' for cpu type
|
nilay
|
January 4th, 2012, 1:07 p.m.
|
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[Submitted] MEM: Differentiate functional cache accesses from CPU and memory
|
ahansson
|
January 5th, 2012, 5:17 a.m.
|
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[Submitted] MIPS: Fix bugs in faults.cc/hh and tlb.cc for MIPS_FS
|
guody
|
January 9th, 2012, 9:16 a.m.
|
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[Submitted] stats: add separate stats for insts/ops both globally and per cpu model
|
atgutier
|
January 9th, 2012, 1:50 p.m.
|
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[Submitted] util: implements "writefile" gem5 op to export file from guest to host filesystem
|
ali
|
January 9th, 2012, 5:27 p.m.
|
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[Submitted] Ruby: Change the access permissions for MOESI hammer
|
ahansson
|
January 10th, 2012, 9:18 a.m.
|
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[Submitted] Config: Allow O3 CPU with Ruby
|
nilay
|
January 10th, 2012, 4:34 p.m.
|
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[Submitted] Initial patch to make gem5 compile with clang/llvm
|
freedom
|
January 10th, 2012, 11:11 p.m.
|
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[Submitted] MIPS: compatibility between MIPS_SE and cross compiler from CodeSorcery
|
guody
|
January 11th, 2012, 8:55 a.m.
|
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[Submitted] Small removal of dead comments/code from alpha ISA
|
dramninjas
|
January 11th, 2012, 10:36 a.m.
|
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[Submitted] A more realistic configuration of an ARM-like processor
|
rdreslin
|
January 11th, 2012, 2:41 p.m.
|
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[Submitted] Alpha: warn_once about broken PAL breakpoints.
|
stever
|
January 11th, 2012, 6:59 p.m.
|
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MIPS: The full patch of MIPS_FS
|
guody
|
January 12th, 2012, 11:22 a.m.
|
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[Submitted] MemCmd: Add a command for invalidation requests to LSQ
|
nilay
|
January 13th, 2012, 3:58 a.m.
|
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MIPS: move the CP0 config code to isa.cc
|
guody
|
January 16th, 2012, 7:25 a.m.
|
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[Submitted] MIPS: implement RemoteGDB::acc function for full system mode debugging
|
guody
|
January 16th, 2012, 7:45 a.m.
|
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[Submitted] MIPS: add a debugging flag head file in vtophys.cc
|
guody
|
January 16th, 2012, 7:51 a.m.
|
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|
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MIPS: get the correct value of Asid in TLB
|
guody
|
January 16th, 2012, 7:58 a.m.
|
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MIPS: add a head file for stacktrace.cc
|
guody
|
January 16th, 2012, 8:47 a.m.
|
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MIPS: fix several instructions related to FS in decoder.isa
|
guody
|
January 16th, 2012, 8:56 a.m.
|
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[Submitted] MEM: Remove onRetryList from BusPort and rely on retryList
|
ahansson
|
January 18th, 2012, 2:29 a.m.
|
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|
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[Submitted] MEM: Introduce the master/slave port roles in the Python classes
|
ahansson
|
January 18th, 2012, 2:31 a.m.
|
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[Submitted] MEM: Pass the ports from Python to C++ using the Swig params
|
ahansson
|
January 18th, 2012, 2:32 a.m.
|
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|
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[Submitted] MEM: Remove the otherPort from the cache ports
|
ahansson
|
January 18th, 2012, 2:33 a.m.
|
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|
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[Submitted] MEM: Explicit ports and Python binding on CopyEngine
|
ahansson
|
January 18th, 2012, 2:34 a.m.
|
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|
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[Submitted] MEM: Make the RubyPort physMemPort a PioPort instead of M5Port
|
ahansson
|
January 18th, 2012, 2:35 a.m.
|
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|
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[Submitted] O3 Fetch: Check if PC is pointing to Microcode ROM
|
nilay
|
January 18th, 2012, 9:57 a.m.
|
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|
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[Submitted] O3 CPU: Provide the squashing instruction
|
nilay
|
January 18th, 2012, 10:06 a.m.
|
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