|
|
[Submitted] arch: fix build under MacOSX
|
bukinr
|
May 6th, 2015, 1:32 p.m.
|
|
|
|
scons: specify swig binary filename in env
|
bukinr
|
April 30th, 2015, 1:42 p.m.
|
|
|
|
[Submitted] base: fix includes for FreeBSD
|
bukinr
|
April 9th, 2015, 9:07 a.m.
|
|
|
|
[Submitted] base: include header file for FreeBSD
|
bukinr
|
April 9th, 2015, 9:29 a.m.
|
|
|
|
[Submitted] dev: dont panic on GIC_EOIR
|
bukinr
|
April 9th, 2015, 9:51 a.m.
|
|
|
|
[Submitted] base: fix FreeBSD OS detection
|
bukinr
|
April 9th, 2015, 9:37 a.m.
|
|
|
|
[Submitted] arch, base, dev, kern, sym: FreeBSD support
|
bukinr
|
April 17th, 2015, 1:35 p.m.
|
|
|
|
[Discarded] arch: move argsInit() from ArmLiveProcess class to ArmLinuxProcess32/64 classes
|
bukinr
|
April 11th, 2015, 12:53 p.m.
|
|
|
|
[Discarded] arch: do not set Linux-specific AT elf relocation types on FreeBSD
|
bukinr
|
April 9th, 2015, 4:42 p.m.
|
|
|
|
[Submitted] Extend access width for IDE control registers
|
bukinr
|
March 25th, 2015, 11:10 a.m.
|
|
|
|
[Submitted] Correct the endianess detection
|
bukinr
|
March 27th, 2015, 2 p.m.
|
|
|
|
[Discarded] [ARM] Full System simulation up to 8 cores
|
butko
|
June 6th, 2012, 8:50 a.m.
|
|
|
|
[ARM] adding support for Ruby memory system
|
butko
|
June 6th, 2012, 8:39 a.m.
|
|
|
|
[Submitted] o3: Create quiesce Events with 0ns or 0 cycles
|
castilloe
|
April 16th, 2015, 4:45 p.m.
|
|
|
|
[Submitted] X86 : fxsave and fxrestore missing template code
|
castilloe
|
August 25th, 2014, 2:20 p.m.
|
|
|
|
[Submitted] ruby: Fixes clock domains in configuration files.
|
castilloe
|
March 31st, 2014, 10:52 a.m.
|
|
|
|
[Submitted] ruby: Fixed a deadlock when restoring a checkpoint with garnet
|
castilloe
|
October 30th, 2013, 1:04 p.m.
|
|
|
|
config, mem: new L2 cache architectures for the classic memory system
|
cataldo
|
June 17th, 2016, 3:03 p.m.
|
|
|
|
config, mem: add command-line options for L2 MSHR queue size and hit latency
|
cataldo
|
June 3rd, 2016, 9:03 p.m.
|
|
|
|
[Submitted] dev: Prevent intel 8254 timer events firing before startup
|
cdirik
|
December 4th, 2014, 7:14 p.m.
|
|
|
|
python: Adding event queue empty check after instantiation before startup
|
cdirik
|
December 4th, 2014, 6:45 p.m.
|
|
|
|
[Submitted] dev: Prevent MC146818 timer RTC events firing before startup
|
cdirik
|
November 28th, 2014, 8:57 p.m.
|
|
|
|
[Submitted] arm, kvm: remove KvmGic
|
cdunham
|
January 17th, 2017, 10:04 p.m.
|
|
|
|
[Submitted] arm, kvm: Automatically use the MuxingKvmGic
|
cdunham
|
January 17th, 2017, 10:04 p.m.
|
|
|
|
[Submitted] arm, kvm: implement MuxingKvmGic
|
cdunham
|
January 17th, 2017, 10:04 p.m.
|
|
|
|
[Submitted] sim, kvm: make KvmVM a System parameter
|
cdunham
|
January 17th, 2017, 10:04 p.m.
|
|
|
|
[Submitted] sim,kvm,arm: fix typos
|
cdunham
|
January 17th, 2017, 10:04 p.m.
|
|
|
|
[Submitted] mem: Update DRAM configuration names
|
cdunham
|
January 17th, 2017, 10:04 p.m.
|
|
|
|
[Submitted] tests: check for gem5 binary before tests
|
cdunham
|
December 15th, 2016, 4:51 p.m.
|
|
|
|
[Submitted] sim: allow forward dependencies in checkpoint upgraders
|
cdunham
|
December 15th, 2016, 4:51 p.m.
|
|
|
|
[Submitted] sim: add support for checkpoint downgrading
|
cdunham
|
December 15th, 2016, 4:51 p.m.
|
|
|
|
[Discarded] mem: fix fast build breakage from CommMonitor refactoring
|
cdunham
|
February 3rd, 2017, 4:49 p.m.
|
|
|
|
[Submitted] dist, dev: fix etherswitch upgrade script
|
cdunham
|
December 15th, 2016, 4:50 p.m.
|
|
|
|
cpu: Add a SynchroTrace replay model
|
cdunham
|
October 26th, 2016, 11:04 p.m.
|
|
|
|
[Submitted] mem: Add DRAM low-power functionality
|
cdunham
|
August 4th, 2016, 4:35 p.m.
|
|
|
|
[Submitted] mem: make DDR4 x16
|
cdunham
|
August 4th, 2016, 4:35 p.m.
|
|
|
|
[Submitted] mem: Add callback to compute stats prior to dump event
|
cdunham
|
August 4th, 2016, 4:35 p.m.
|
|
|
|
[Submitted] mem: Sort memory commands and update DRAMPower
|
cdunham
|
August 4th, 2016, 4:35 p.m.
|
|
|
|
[Submitted] mem: Modify drain to ensure banks and power are idled
|
cdunham
|
August 4th, 2016, 4:35 p.m.
|
|
|
|
[Submitted] mem: update DDR3 die revision
|
cdunham
|
August 4th, 2016, 4:35 p.m.
|
|
|
|
[Submitted] mem: add DRAM powerdown timing
|
cdunham
|
August 4th, 2016, 4:35 p.m.
|
|
|
|
[Submitted] mem: add DRAM powerdown current
|
cdunham
|
August 4th, 2016, 4:35 p.m.
|
|
|
|
[Submitted] isa,arm: Add missing AArch32 FP instructions
|
cdunham
|
August 16th, 2016, 1:31 p.m.
|
|
|
|
[Discarded] arm, config: Fixups for the example big.LITTLE(tm) configuration
|
cdunham
|
August 16th, 2016, 1:56 p.m.
|
|
|
|
[Discarded] cpu: remove O3's fetch address validity check
|
cdunham
|
October 12th, 2015, 4:13 p.m.
|
|
|
|
[Submitted] arm: bank GIC registers per CPU
|
cdunham
|
July 18th, 2016, 3:26 p.m.
|
|
|
|
[Submitted] arm: s/ctx_id/ctx/ the GIC
|
cdunham
|
July 18th, 2016, 3:26 p.m.
|
|
|
|
[Submitted] arm: invalidate TLB miscreg cache on modification of HSCTLR
|
cdunham
|
June 21st, 2016, 1:41 p.m.
|
|
|
|
[Submitted] arm: Fix stage 2 determination in table walker
|
cdunham
|
June 21st, 2016, 1:41 p.m.
|
|
|
|
[Submitted] arm: refactor page table walking
|
cdunham
|
June 21st, 2016, 1:41 p.m.
|
|
