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[Submitted] mem: Create a request copy for deferred snoops
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ahansson
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April 2nd, 2015, 9:31 a.m.
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[Discarded] MEM: TranslatingPorts are replaced with SETranslatingProxys
|
ahansson
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November 28th, 2011, 10:16 a.m.
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[Submitted] Bridge: Split deferred request, response and sender state
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ahansson
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May 23rd, 2012, 6:31 a.m.
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[Submitted] Timing CPU: Remove a redundant port pointer
|
ahansson
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June 6th, 2012, 9:43 a.m.
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[Submitted] Clock: Make Tick unsigned and remove UTick
|
ahansson
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July 26th, 2012, 4:55 a.m.
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[Submitted] Port: Stricter port bind/unbind semantics
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ahansson
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August 20th, 2012, 7:32 a.m.
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[Submitted] Clock: Inherit the clock from parent by default
|
ahansson
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September 21st, 2012, 9:06 a.m.
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[Submitted] dev: Remove zero-time loop in DMA timing send
|
ahansson
|
October 19th, 2012, 2:29 a.m.
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[Submitted] mem: Merge ranges that are part of the conf table
|
ahansson
|
December 6th, 2012, 8:16 p.m.
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[Submitted] mem: Cancel cache retry event when blocking port
|
ahansson
|
March 14th, 2013, 7:04 a.m.
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[Submitted] ruby: Remove RubyMemoryControl and associated files
|
ahansson
|
November 30th, 2016, 4:48 p.m.
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[Submitted] sim: Add the notion of clock domains to all ClockedObjects
|
ahansson
|
May 24th, 2013, 3:32 a.m.
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[Discarded] sim: Pre-compute the clock period
|
ahansson
|
May 27th, 2013, 11:25 a.m.
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[Submitted] config: Move the memory instantiation outside FSConfig
|
ahansson
|
July 15th, 2013, 8:42 a.m.
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[Submitted] mem: Fix the LPDDR3 page size
|
ahansson
|
October 16th, 2013, 7:50 a.m.
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[Submitted] mem: DDR3 config for comparing with DRAMSim2
|
ahansson
|
March 7th, 2014, 11:36 p.m.
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[Submitted] cpu: Timebuf const accessors
|
ahansson
|
April 23rd, 2014, 12:25 p.m.
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[Submitted] mem: Add utility script to plot DRAM efficiency sweep
|
ahansson
|
August 13th, 2014, 12:49 p.m.
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[Submitted] arm: Assume we have a kernel that supports pci devices
|
ahansson
|
August 20th, 2014, 8:35 a.m.
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[Submitted] energy: Tighter checking of levels for DFS systems
|
ahansson
|
September 10th, 2014, 7:53 a.m.
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[Submitted] scons: Warn for known gcc and swig incompatibilities
|
ahansson
|
September 29th, 2014, 10:36 a.m.
|
|
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[Submitted] sim: EventQueue wakeup on events scheduled outside the event loop
|
ahansson
|
September 29th, 2014, 10:45 a.m.
|
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[Submitted] mem: Cleanup Packet::checkFunctional and hasData usage
|
ahansson
|
November 17th, 2014, 6:16 a.m.
|
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[Submitted] arm: Fix TLB ignoring faults when table walking
|
ahansson
|
November 25th, 2014, 9:48 a.m.
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[Submitted] mem: Add MemChecker and MemCheckerMonitor
|
ahansson
|
December 12th, 2014, 5:45 p.m.
|
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|
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[Submitted] cpu: Remove the InOrderCPU from the tree
|
ahansson
|
March 24th, 2015, 3:50 p.m.
|
|
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[Submitted] MEM: Introduce the master/slave port roles in the Python classes
|
ahansson
|
January 18th, 2012, 2:31 a.m.
|
|
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[Submitted] MEM: Fix master/slave ports in Ruby and non-regression scripts
|
ahansson
|
February 13th, 2012, 11:05 a.m.
|
|
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[Submitted] Bus: Make the default bus width 8 bytes instead of 64
|
ahansson
|
June 11th, 2012, 7:44 a.m.
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Port: Separate the port and the interface protocol
|
ahansson
|
July 10th, 2012, 4:07 a.m.
|
|
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[Submitted] Device: Remove overloaded pio_latency parameter
|
ahansson
|
August 3rd, 2012, 9:05 a.m.
|
|
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[Submitted] Regression: Use addTwoLevelCacheHierarchy in configs
|
ahansson
|
September 27th, 2012, 6:28 a.m.
|
|
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[Submitted] mem: Simplify cache packet handling for uncacheable writes
|
ahansson
|
March 31st, 2016, 6:19 p.m.
|
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[Submitted] mem: Enforce strict use of busFirst- and busLastWordTime
|
ahansson
|
February 14th, 2013, 1:53 a.m.
|
|
|
|
[Submitted] util: Auto generate the packet proto definitions
|
ahansson
|
April 22nd, 2013, 2:44 p.m.
|
|
|
|
[Submitted] cpu: Fix a bug in the O3 CPU introduced by the cache line patch
|
ahansson
|
August 7th, 2013, 3:12 p.m.
|
|
|
|
[Submitted] sim: Clarify the difference between tracing and debugging
|
ahansson
|
October 17th, 2013, 5:37 p.m.
|
|
|
|
[Submitted] arch: remove inline specifiers on all inst constrs, all ISAs
|
ahansson
|
April 23rd, 2014, 12:14 p.m.
|
|
|
|
[Submitted] mem: Remove printing of DRAM params
|
ahansson
|
April 23rd, 2014, 12:36 p.m.
|
|
|
|
[Submitted] cpu, mem: Make software prefetches non-blocking
|
ahansson
|
August 13th, 2014, 2:08 p.m.
|
|
|
|
[Submitted] cpu: Probe points for basic PMU stats
|
ahansson
|
September 29th, 2014, 10:38 a.m.
|
|
|
|
[Submitted] mem: Change prefetcher to use random_mt
|
ahansson
|
December 12th, 2014, 5:50 p.m.
|
|
|
|
[Submitted] config: add --root-device machine parameter
|
ahansson
|
January 28th, 2015, 10:06 a.m.
|
|
|
|
[Submitted] mem: Fix prefetchSquash + memInhibitAsserted bug
|
ahansson
|
February 13th, 2015, 8:36 a.m.
|
|
|
|
[Submitted] mem, alpha: Move Alpha-specific request flags
|
ahansson
|
March 30th, 2015, 9:17 a.m.
|
|
|
|
[Submitted] SPARC: Fixing a minor copy-paste bug using the wrong variable
|
ahansson
|
November 24th, 2011, 10:04 a.m.
|
|
|
|
[Submitted] CPU: Moving towards a more general port across CPU models
|
ahansson
|
December 19th, 2011, 5:54 a.m.
|
|
|
|
[Submitted] mem: Store snoop filter lookup result to avoid second lookup
|
ahansson
|
August 21st, 2015, 3:49 p.m.
|
|
|
|
[Submitted] gcc: Enable Link-Time Optimization for gcc >= 4.6
|
ahansson
|
May 2nd, 2012, 11:24 a.m.
|
|
|
|
[Submitted] mem: Avoid setting markPending if not needed
|
ahansson
|
August 31st, 2015, 9:20 a.m.
|
|
