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[Submitted] Bus: Have the I/O devices that return address ranges print them out.
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ali
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October 2nd, 2010, 7:12 p.m.
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[Submitted] Bus: Simulation fatals instead of segfault when the destination port is NULL.
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ali
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December 16th, 2011, 1:32 p.m.
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[Submitted] Cache: add a response latency to the caches
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ali
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September 7th, 2012, 12:25 p.m.
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[Submitted] cache: Allow main memory to be at disjoint address ranges.
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ali
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March 6th, 2012, 4:54 p.m.
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[Submitted] Cache: Collect very basic stats on tag and data accesses
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ali
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November 14th, 2013, 9:08 p.m.
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[Submitted] cache: Fix handling of LL/SC requests under contention
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ali
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June 12th, 2014, 10:46 p.m.
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[Submitted] cache: Fix issue where IO cache read, prefetch and dirty data in L1 cause coherence bug.
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ali
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March 26th, 2013, 1:54 p.m.
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[Submitted] Cache: Panic if you attempt to create a checkpoint with a cache in the system
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ali
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May 2nd, 2012, 1:07 p.m.
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[Submitted] CheckerCPU: Re-factor CheckerCPU to be compatible current state of gem5
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ali
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November 3rd, 2011, 1:27 p.m.
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[Submitted] CLCD: Fix some serialization bugs with the clcd controller.
|
ali
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February 11th, 2011, 4:37 p.m.
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[Submitted] config: Add a KVM VM to systems with KVM CPUs
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ali
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March 8th, 2013, 6:16 a.m.
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[Submitted] Config: Add support for a Self.all proxy object
|
ali
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May 26th, 2011, 7:15 p.m.
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[Submitted] config: Change parsing of Addr so hex values work from scripts
|
ali
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June 12th, 2014, 10:47 p.m.
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[Submitted] config: Cleanup CPU configuration
|
ali
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January 7th, 2013, 11:24 a.m.
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[Discarded] Config: Configure m5 caches via the command line.
|
ali
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February 11th, 2011, 4:34 p.m.
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[Submitted] config: Move CPU handover logic to m5.switchCpus()
|
ali
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January 7th, 2013, 11:24 a.m.
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[Submitted] config: Remove O3 dependencies
|
ali
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January 7th, 2013, 11:25 a.m.
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[Submitted] config: support outputing a pickle of the configuration tree
|
ali
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December 16th, 2011, 1:30 p.m.
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[Submitted] Core: Add some documentation about the sim clocks.
|
ali
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April 10th, 2011, 4:49 p.m.
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[Submitted] CPU/Cache: Fix some errors exposed by valgrind
|
ali
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September 22nd, 2010, 1:43 a.m.
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[Submitted] cpu: Add a fetch queue to the o3 cpu.
|
ali
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June 12th, 2014, 10:49 p.m.
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[Submitted] CPU: Add abandoned instructions to O3 Pipe Viewer
|
ali
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September 7th, 2012, 12:22 p.m.
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[Submitted] cpu: Add CPU metadata om the Python classes
|
ali
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January 7th, 2013, 11:24 a.m.
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[Submitted] cpu: Add CPU support for generatig wake up events when LLSC adresses are snooped.
|
ali
|
November 30th, 2013, 11:49 p.m.
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[Submitted] cpu: Add header files for checker CPUs
|
ali
|
October 24th, 2012, 2:27 p.m.
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[Submitted] CPU: Add some useful debug message to the timing simple cpu.
|
ali
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May 2nd, 2011, 3:21 p.m.
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[Submitted] cpu: Add support for instructions that zero cache lines.
|
ali
|
November 30th, 2013, 11:51 p.m.
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[Submitted] cpu: Add support for Memory+Barrier instruction types in O3 cpu.
|
ali
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November 30th, 2013, 11:39 p.m.
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[Submitted] cpu: add support for outputing a protobuf formatted CPU trace
|
ali
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December 10th, 2014, 5:57 p.m.
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[Submitted] cpu: Change writeback modeling for outstanding instructions
|
ali
|
June 12th, 2014, 10:48 p.m.
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[Submitted] cpu: Construct ROB with cpu params struct instead of each variable
|
ali
|
October 17th, 2013, 4:58 p.m.
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[Submitted] cpu: Correctly call parent on switchOut() and takeOverFrom()
|
ali
|
December 6th, 2012, 11:59 a.m.
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[Submitted] CPU: Fix a case where timing simple cpu faults can nest.
|
ali
|
May 2nd, 2011, 3:20 p.m.
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[Submitted] cpu: Fix a livelock in the o3 cpu.
|
ali
|
January 22nd, 2013, 1:45 p.m.
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[Submitted] cpu: fix a switching issue with the o3 cpu.
|
ali
|
February 25th, 2013, 9:54 a.m.
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[Submitted] cpu: Fix broken squashAfter implementation in O3 CPU
|
ali
|
December 6th, 2012, 12:05 p.m.
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[Submitted] cpu: Fix broken thread context handover
|
ali
|
December 6th, 2012, 12:13 p.m.
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[Submitted] CPU: Fix bug when a split transaction is issued to a faster cache
|
ali
|
November 11th, 2010, 4:12 p.m.
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[Submitted] cpu: fix case with o3 cpu blocking and unblocking decode in cycle
|
ali
|
January 22nd, 2013, 1:47 p.m.
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[Submitted] cpu: Fix incorrect speculative branch predictor behavior
|
ali
|
June 12th, 2014, 10:50 p.m.
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[Submitted] cpu: Fix O3 issuse with load+barrier instructions.
|
ali
|
October 17th, 2013, 4:56 p.m.
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[Submitted] cpu: Fix SMT scheduling issue with the O3 cpu
|
ali
|
June 12th, 2014, 10:50 p.m.
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[Submitted] cpu: generate SimPoint basic block vector profiles
|
ali
|
February 13th, 2013, 8:47 a.m.
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[Submitted] cpu: Initialize the O3 pipeline from startup()
|
ali
|
December 6th, 2012, 11:56 a.m.
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[Discarded] CPU: Make (post|clear)Interrupt and clearInterrupts virtual
|
ali
|
November 2nd, 2012, 10:13 a.m.
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[Submitted] cpu: Make checker CPUs inherit from CheckerCPU in the Python hierarchy
|
ali
|
January 7th, 2013, 11:24 a.m.
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[Submitted] CPU: Make Exec trace to print predication result (if false) for memory instructions
|
ali
|
August 13th, 2010, 9:52 a.m.
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[Submitted] cpu: Make sure that a drained atomic CPU isn't executing ucode
|
ali
|
December 6th, 2012, 12:21 p.m.
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[Submitted] cpu: Make sure that a drained timing CPU isn't executing ucode
|
ali
|
December 6th, 2012, 12:16 p.m.
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[Submitted] cpu: O3 add a header declaring the DerivO3CPU
|
ali
|
October 24th, 2012, 2:28 p.m.
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