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[Submitted] cpu/o3: clean up rename map and free list
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stever
|
August 22nd, 2013, 12:40 a.m.
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[Submitted] cpu: add a condition-code register class
|
stever
|
August 22nd, 2013, 12:41 a.m.
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[Submitted] arch/x86: add support for explicit CC register file
|
stever
|
August 22nd, 2013, 12:41 a.m.
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[Submitted] scons: fix minor update-ref bug in regressions
|
stever
|
September 28th, 2013, 2:15 a.m.
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[Submitted] ruby: eliminate non-determinism from ruby.stats output
|
stever
|
September 28th, 2013, 2:18 a.m.
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[Submitted] ruby: Fixed a deadlock when restoring a checkpoint with garnet
|
castilloe
|
October 30th, 2013, 1:04 p.m.
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[Submitted] mem: Fixes for DRAM stats accounting
|
ahansson
|
October 31st, 2013, 9:46 a.m.
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[Submitted] mem: Fix DRAM bank occupancy for streaming access
|
ahansson
|
October 16th, 2013, 7:39 a.m.
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[Submitted] test: Use SimpleMemory for atomic full-system tests
|
ahansson
|
October 17th, 2013, 5:31 p.m.
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[Submitted] sim: Clarify the difference between tracing and debugging
|
ahansson
|
October 17th, 2013, 5:37 p.m.
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[Submitted] mem: Fix the LPDDR3 page size
|
ahansson
|
October 16th, 2013, 7:50 a.m.
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[Submitted] mem: Adding stats for DRAM power calculation
|
ahansson
|
October 16th, 2013, 7:49 a.m.
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[Submitted] mem: Unify request selection for read and write queues
|
ahansson
|
October 16th, 2013, 7:48 a.m.
|
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[Submitted] mem: Add a simple adaptive version of the open-page policy
|
ahansson
|
October 16th, 2013, 7:47 a.m.
|
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[Submitted] mem: Just-in-time write scheduling in DRAM controller
|
ahansson
|
October 16th, 2013, 7:45 a.m.
|
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[Submitted] mem: Add tRRD as a timing parameter for the DRAM controller
|
ahansson
|
October 16th, 2013, 7:44 a.m.
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[Submitted] mem: Less conservative tRAS in DRAM configurations
|
ahansson
|
October 16th, 2013, 7:43 a.m.
|
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[Submitted] mem: Make tXAW enforcement less conservative and per rank
|
ahansson
|
October 16th, 2013, 7:42 a.m.
|
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[Submitted] mem: Pick the next DRAM request based on bank availability
|
ahansson
|
October 16th, 2013, 7:41 a.m.
|
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[Submitted] mem: Use the same timing calculation for DRAM read and write
|
ahansson
|
October 16th, 2013, 7:40 a.m.
|
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[Submitted] mem: Schedule time for DRAM event taking tRAS into account
|
ahansson
|
October 16th, 2013, 7:38 a.m.
|
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[Submitted] mem: Add tRAS parameter to the DRAM controller model
|
ahansson
|
October 16th, 2013, 7:36 a.m.
|
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[Submitted] arm: fix m5ops binary for ARM and add m5fail.
|
ali
|
October 17th, 2013, 4:57 p.m.
|
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[Submitted] cpu: Construct ROB with cpu params struct instead of each variable
|
ali
|
October 17th, 2013, 4:58 p.m.
|
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[Submitted] cpu: Fix O3 issuse with load+barrier instructions.
|
ali
|
October 17th, 2013, 4:56 p.m.
|
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[Submitted] dev: Add 'OSC' oscillator sys control reg support to VersatileExpress
|
ali
|
October 17th, 2013, 4:59 p.m.
|
|
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[Submitted] dev: Add support for MSI-X and Capability Lists for ARM and PCI devices
|
ali
|
October 17th, 2013, 4:59 p.m.
|
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[Submitted] dev: Fix race conditions in IDE device on newer kernels
|
ali
|
October 17th, 2013, 4:58 p.m.
|
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[Submitted] mem: Add "const" attribute to Packet getters
|
ali
|
October 17th, 2013, 4:57 p.m.
|
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[Submitted] mem: Add privilege info to request class
|
ali
|
October 17th, 2013, 4:57 p.m.
|
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[Submitted] sim: added option to serialize SimLoopExitEvent
|
ali
|
October 17th, 2013, 4:57 p.m.
|
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[Submitted] simobject: Fix handling of parents for simobject vectors
|
ali
|
October 17th, 2013, 4:58 p.m.
|
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[Submitted] util: Add a script to convert gem5 stats to a Streamline .apc project
|
ali
|
September 27th, 2013, 12:23 a.m.
|
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gem5ops: Update util/m5/Makefile.x86 to compile Java JNI for gem5Ops
|
gedare
|
November 11th, 2013, 9:50 p.m.
|
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[Submitted] sim: fix event priority name for debug-start option
|
atgutier
|
November 12th, 2013, 4:51 p.m.
|
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[Discarded] IGbE: Add additional features required by igb kernel driver in 2.6.28+.
|
ali
|
February 13th, 2012, 3:41 p.m.
|
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[Submitted] tests: suppress output on switcheroo tests
|
stever
|
October 16th, 2013, 4:45 p.m.
|
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[Submitted] cpu: Fix Checker register index use
|
ahansson
|
November 5th, 2013, 4:34 p.m.
|
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[Submitted] cpu: allow the fetch buffer to be smaller than a cache line
|
atgutier
|
February 18th, 2013, 8:20 a.m.
|
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[Submitted] sim: simulate with multiple event queues
|
nilay
|
January 25th, 2013, 3:41 a.m.
|
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|
|
O3CPU: Revive cachePorts per-cycle dcache access limit
|
erik.t
|
May 17th, 2013, 3:53 a.m.
|
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|
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[Submitted] kvm: Set the perf exclude_host attribute if available
|
andysan
|
October 15th, 2013, 11:47 a.m.
|
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[Submitted] sim: correct tickToCycles() function.
|
nilay
|
November 25th, 2013, 5:23 p.m.
|
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[Submitted] base: Fix race in PollQueue and remove SIGALRM
|
andysan
|
October 7th, 2013, 2:10 p.m.
|
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[Submitted] base: Clean up signal handling
|
andysan
|
October 7th, 2013, 2:12 p.m.
|
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[Submitted] x86: Implementation of Int3 and Int_Ib in long mode
|
chrism
|
June 28th, 2013, 1:25 p.m.
|
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[Submitted] util: update checkpoint aggregation script
|
nilay
|
November 29th, 2013, 5 p.m.
|
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[Submitted] sim: reset stats after startup
|
nilay
|
September 10th, 2013, 12:35 a.m.
|
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[Submitted] sim: Add support for dynamic frequency scaling
|
ctorng
|
December 16th, 2013, 6:05 a.m.
|
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[Submitted] mips: Floating point convert bug fix
|
ctorng
|
December 12th, 2013, 4:35 a.m.
|
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