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[Submitted] misc: Clean up and complete the gem5<->SystemC-TLM bridge [4/10]
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cmenard
|
November 7th, 2016, 4:43 p.m.
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[Submitted] misc: Clean up and complete the gem5<->SystemC-TLM bridge [3/10]
|
cmenard
|
October 26th, 2016, 4:26 p.m.
|
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[Submitted] misc: Clean up and complete the gem5<->SystemC-TLM bridge [2/10]
|
cmenard
|
June 23rd, 2016, 3:32 p.m.
|
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[Submitted] misc: Clean up and complete the gem5<->SystemC-TLM bridge [1/10]
|
cmenard
|
June 23rd, 2016, 3:32 p.m.
|
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[Submitted] misc: add a MasterId to the ExternalPort
|
cmenard
|
May 26th, 2016, 11:38 a.m.
|
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[Submitted] misc: fix a compile error due to incompability with SystemC 2.3.1
|
cmenard
|
May 19th, 2016, 9:49 a.m.
|
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[Discarded] util/m5: use CURDIR instead of PWD
|
cirosantilli
|
February 21st, 2018, 4:56 p.m.
|
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[Submitted] x86: Implementation of Int3 and Int_Ib in long mode
|
chrism
|
June 28th, 2013, 1:25 p.m.
|
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[Submitted] x86: bugfix: lret instruction has to increment the stack pointer
|
chrism
|
April 17th, 2013, 4:37 a.m.
|
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[Discarded] mem: fix fast build breakage from CommMonitor refactoring
|
cdunham
|
February 3rd, 2017, 4:49 p.m.
|
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|
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[Submitted] arm, kvm: remove KvmGic
|
cdunham
|
January 17th, 2017, 10:04 p.m.
|
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[Submitted] arm, kvm: Automatically use the MuxingKvmGic
|
cdunham
|
January 17th, 2017, 10:04 p.m.
|
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[Submitted] arm, kvm: implement MuxingKvmGic
|
cdunham
|
January 17th, 2017, 10:04 p.m.
|
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[Submitted] sim, kvm: make KvmVM a System parameter
|
cdunham
|
January 17th, 2017, 10:04 p.m.
|
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[Submitted] sim,kvm,arm: fix typos
|
cdunham
|
January 17th, 2017, 10:04 p.m.
|
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[Submitted] mem: Update DRAM configuration names
|
cdunham
|
January 17th, 2017, 10:04 p.m.
|
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[Submitted] tests: check for gem5 binary before tests
|
cdunham
|
December 15th, 2016, 4:51 p.m.
|
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[Submitted] sim: allow forward dependencies in checkpoint upgraders
|
cdunham
|
December 15th, 2016, 4:51 p.m.
|
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[Submitted] sim: add support for checkpoint downgrading
|
cdunham
|
December 15th, 2016, 4:51 p.m.
|
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[Submitted] dist, dev: fix etherswitch upgrade script
|
cdunham
|
December 15th, 2016, 4:50 p.m.
|
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cpu: Add a SynchroTrace replay model
|
cdunham
|
October 26th, 2016, 11:04 p.m.
|
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|
[Discarded] arm, config: Fixups for the example big.LITTLE(tm) configuration
|
cdunham
|
August 16th, 2016, 1:56 p.m.
|
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[Submitted] isa,arm: Add missing AArch32 FP instructions
|
cdunham
|
August 16th, 2016, 1:31 p.m.
|
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|
[Submitted] mem: add DRAM powerdown current
|
cdunham
|
August 4th, 2016, 4:35 p.m.
|
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[Submitted] mem: Add DRAM low-power functionality
|
cdunham
|
August 4th, 2016, 4:35 p.m.
|
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|
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[Submitted] mem: Add callback to compute stats prior to dump event
|
cdunham
|
August 4th, 2016, 4:35 p.m.
|
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[Submitted] mem: Modify drain to ensure banks and power are idled
|
cdunham
|
August 4th, 2016, 4:35 p.m.
|
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[Submitted] mem: Sort memory commands and update DRAMPower
|
cdunham
|
August 4th, 2016, 4:35 p.m.
|
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|
|
[Submitted] mem: update DDR3 die revision
|
cdunham
|
August 4th, 2016, 4:35 p.m.
|
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|
|
[Submitted] mem: add DRAM powerdown timing
|
cdunham
|
August 4th, 2016, 4:35 p.m.
|
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|
|
[Submitted] mem: make DDR4 x16
|
cdunham
|
August 4th, 2016, 4:35 p.m.
|
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|
|
[Submitted] arm: s/ctx_id/ctx/ the GIC
|
cdunham
|
July 18th, 2016, 3:26 p.m.
|
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|
|
[Submitted] arm: bank GIC registers per CPU
|
cdunham
|
July 18th, 2016, 3:26 p.m.
|
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|
|
[Submitted] arm, config: Add an example ARM big.LITTLE(tm) configuration script
|
cdunham
|
July 8th, 2016, 10:28 a.m.
|
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|
|
[Submitted] cpu: Fix Minor SMT WFI/drain interaction issues
|
cdunham
|
July 5th, 2016, 2 p.m.
|
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|
|
[Submitted] isa: Modify get/check interrupt routines
|
cdunham
|
July 5th, 2016, 2 p.m.
|
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|
[Submitted] arm: refactor page table walking
|
cdunham
|
June 21st, 2016, 1:41 p.m.
|
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|
|
[Submitted] arm: warn not fail on use of missing miscreg CNTHCTL_EL2
|
cdunham
|
June 21st, 2016, 1:41 p.m.
|
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|
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[Submitted] arm: Check TLB stage 2 permissions in AArch64
|
cdunham
|
June 21st, 2016, 1:41 p.m.
|
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|
|
[Submitted] arm: correctly assign faulting IPA's to HPFAR_EL2
|
cdunham
|
June 21st, 2016, 1:41 p.m.
|
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|
|
[Submitted] arm: Add TLBI instruction for stage 2 IPA's
|
cdunham
|
June 21st, 2016, 1:41 p.m.
|
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[Submitted] arm: Fix stage 2 memory attribute checking in AArch64
|
cdunham
|
June 21st, 2016, 1:41 p.m.
|
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|
[Submitted] arm: Fix trapping to Hypervisor during MSR/MRS read/write
|
cdunham
|
June 21st, 2016, 1:41 p.m.
|
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|
|
[Submitted] arm: Fix secure state checking in various places
|
cdunham
|
June 21st, 2016, 1:41 p.m.
|
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|
|
[Submitted] arm: Fix stage 2 determination in table walker
|
cdunham
|
June 21st, 2016, 1:41 p.m.
|
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|
|
[Submitted] arm: Refactor aarch64 table walk logic to remove redundancy
|
cdunham
|
June 21st, 2016, 1:41 p.m.
|
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|
|
[Submitted] arm: Add check to fault routing for hypervisor/virtualization
|
cdunham
|
June 21st, 2016, 1:41 p.m.
|
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|
|
[Submitted] arm: Add AArch64 hypervisor call instruction 'hvc'
|
cdunham
|
June 21st, 2016, 1:41 p.m.
|
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|
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[Submitted] arm: Fix EL perceived at TLB for address translation instructions
|
cdunham
|
June 21st, 2016, 1:41 p.m.
|
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|
|
[Submitted] arm: enable EL2 support
|
cdunham
|
June 21st, 2016, 1:41 p.m.
|
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