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[Submitted] O3CPU: Fix a bug where stores in the cpu where never marked as split.
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tmjones
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July 9th, 2010, 6:19 p.m.
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[Submitted] O3CPU: Fix iqCount and lsqCount SMT fetch policies.
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tmjones
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July 29th, 2010, 9:27 a.m.
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[Submitted] O3CPU: O3's tick event gets squashed when it is switched out. When repeatedly
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tmjones
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July 9th, 2010, 6:12 p.m.
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[Submitted] Port: Only indicate that a SimpleTimingPort is drained if its send event is
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tmjones
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July 9th, 2010, 6:20 p.m.
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[Submitted] Power: Provide a utility function to copy registers from one thread context
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tmjones
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July 9th, 2010, 5:52 p.m.
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[Submitted] Power: The condition register should be set or cleared upon a system call
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tmjones
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July 21st, 2010, 12:25 p.m.
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[Submitted] ruby: Fix checkpointing and restore
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tmjones
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June 23rd, 2015, 1:17 p.m.
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[Submitted] ruby: Fix memWriteback() not to record auto-delete events
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tmjones
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July 8th, 2015, 8:32 p.m.
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Sim: Add functionality to the simulation scripts to allow running with
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tmjones
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July 9th, 2010, 6:21 p.m.
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[Discarded] Sim: When one CPU is taking over from another, the new CPU's memory is only
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tmjones
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July 9th, 2010, 6:11 p.m.
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[Discarded] SimpleCPU: Allow Simple CPUs to warm a branch predictor by creating a pointer
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tmjones
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July 9th, 2010, 6:10 p.m.
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Stats: Allow backing up and restoring of stats which is needed for SMARTS
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tmjones
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July 9th, 2010, 6:21 p.m.
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[Submitted] Syscall: Don't close the simulator's standard file descriptors.
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tmjones
|
July 9th, 2010, 6:14 p.m.
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[Discarded] mem: Prevent Cache wrongly deleting requests
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tkhsu
|
December 10th, 2015, 7:36 a.m.
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[Submitted] Invalid alignment checks in mmap and mremap
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tjablin
|
February 22nd, 2013, 9:38 a.m.
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[Discarded] Systemc-GEM5
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tito20065
|
January 20th, 2015, 8:08 a.m.
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[Submitted] X86: ISA bug fixes identified when bringing up Barrelfish OS
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tharris
|
February 4th, 2011, 5:04 a.m.
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Add Global-Global (gAG) branch predictor
|
taylorlloyd
|
May 10th, 2013, 10:18 a.m.
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[Submitted] patch to fix early termination in SE multi-core simualtion
|
taozhang
|
October 5th, 2012, 3:45 p.m.
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[Submitted] Invalidating TLB entry on page fault in x86
|
swapnilh
|
October 26th, 2015, 4:37 a.m.
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[Submitted] Add hook to call map() on Process from python.
|
stever
|
June 27th, 2012, 8:46 p.m.
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[Submitted] Alpha: warn_once about broken PAL breakpoints.
|
stever
|
January 11th, 2012, 6:59 p.m.
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[Submitted] arch, x86: add support for arrays as memory operands
|
stever
|
January 19th, 2016, 4:01 a.m.
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[Submitted] arch/x86: add support for explicit CC register file
|
stever
|
August 22nd, 2013, 12:41 a.m.
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[Submitted] arch: clean up isa_parser error handling
|
stever
|
September 4th, 2015, 4:34 p.m.
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[Submitted] arch: don't call *Timing functions from *Atomic versions
|
stever
|
December 31st, 2015, 8:01 a.m.
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[Submitted] arch: get rid of dummy var init
|
stever
|
January 19th, 2016, 3:48 a.m.
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[Submitted] arch: get rid of unused LargestRead typedef
|
stever
|
December 31st, 2015, 8 a.m.
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[Submitted] base: disable FastAlloc in debug builds by default
|
stever
|
March 16th, 2011, 10:55 a.m.
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[Submitted] bus: clean up default responder code.
|
stever
|
July 29th, 2010, 9:35 p.m.
|
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[Submitted] cache: add CacheVerbose debug flag, filter noisy DPRINTFs
|
stever
|
October 4th, 2015, 6:24 a.m.
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[Submitted] cache: add local var in recvTimingResp()
|
stever
|
February 9th, 2015, 6:05 a.m.
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[Submitted] cache: coherence protocol enhancements & bug fixes
|
stever
|
August 27th, 2010, 3:50 p.m.
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cache: enable multiple stores per cycle
|
stever
|
May 14th, 2014, 5:46 a.m.
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[Submitted] cache: fail SC when invalidated while waiting for bus
|
stever
|
August 27th, 2010, 3:50 p.m.
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[Submitted] cache: remove redundant test in recvTimingResp()
|
stever
|
February 9th, 2015, 6:05 a.m.
|
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[Submitted] config: expand '~' and '~user' in paths
|
stever
|
March 14th, 2015, 5:16 p.m.
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[Submitted] config: make M5_PATH a real search path
|
stever
|
November 24th, 2014, 2:48 a.m.
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[Submitted] config: revamp x86 config to avoid appending to SimObjectVectors
|
stever
|
March 26th, 2011, 12:17 p.m.
|
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[Submitted] config: tweak ruby configs to clean up hierarchy
|
stever
|
May 23rd, 2011, 9:21 a.m.
|
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[Submitted] configs: clean up checkpoint code in Simulation.py
|
stever
|
July 29th, 2010, 9:45 p.m.
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[Submitted] cpu. arch: add initiateMemRead() to ExecContext interface
|
stever
|
December 31st, 2015, 8:10 a.m.
|
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[Submitted] cpu/inorder: merge register class enums
|
stever
|
August 22nd, 2013, 12:38 a.m.
|
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[Submitted] cpu/o3: clean up physical register file
|
stever
|
August 22nd, 2013, 12:38 a.m.
|
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[Submitted] cpu/o3: clean up rename map and free list
|
stever
|
August 22nd, 2013, 12:40 a.m.
|
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[Submitted] cpu/o3: clean up scoreboard object
|
stever
|
August 22nd, 2013, 12:39 a.m.
|
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[Submitted] cpu: add a condition-code register class
|
stever
|
August 22nd, 2013, 12:41 a.m.
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[Submitted] cpu: clean up architectural register classification
|
stever
|
August 22nd, 2013, 12:37 a.m.
|
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[Submitted] cpu: rename *_DepTag constants to *_Reg_Base
|
stever
|
August 22nd, 2013, 12:40 a.m.
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[Submitted] dev/arm: get rid of AmbaDev namespace
|
stever
|
March 21st, 2013, 10:11 p.m.
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