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[Submitted] MESI Coherence Protocol: Add calls for profiling misses
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nilay
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November 1st, 2011, 10:29 p.m.
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[Submitted] O3: Add stat that counts how many cycles the O3 cpu was quiesced.
|
ali
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November 3rd, 2011, 1:23 p.m.
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[Submitted] ARM: Add IsSerializeAfter and IsNonSpeculative flag to the syscall instruction .
|
ali
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November 3rd, 2011, 1:24 p.m.
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[Submitted] Output: Add hierarchical output support and cleanup existing codebase.
|
ali
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November 3rd, 2011, 1:24 p.m.
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[Submitted] VNC: Add support for capturing frame buffer to file each time it is changed.
|
ali
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November 3rd, 2011, 1:24 p.m.
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[Submitted] ARM: Add support for having a TLB cache.
|
ali
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November 3rd, 2011, 1:24 p.m.
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[Submitted] Device: Make changes necessary to support a coherent page walker cache.
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ali
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November 3rd, 2011, 1:24 p.m.
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[Submitted] O3: Remove hardcoded tgts_per_mshr in O3CPU.py.
|
ali
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November 3rd, 2011, 1:24 p.m.
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[Submitted] CheckerCPU: Re-factor CheckerCPU to be compatible current state of gem5
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ali
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November 3rd, 2011, 1:27 p.m.
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[Submitted] O3 LSQ: Implement TSO
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nilay
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November 15th, 2011, 6:59 a.m.
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[Submitted] SE: Change very noise warn message to warn_once
|
ali
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November 16th, 2011, 9:02 p.m.
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[Submitted] CheckerCPU: Re-factor CheckerCPU to be compatible with current gem5
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blakegw
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November 23rd, 2011, 2:50 p.m.
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[Submitted] SPARC: Fixing a minor copy-paste bug using the wrong variable
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ahansson
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November 24th, 2011, 10:04 a.m.
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[Submitted] Compiler: Add an M5_NO_INLINE define.
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gblack
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November 27th, 2011, 2:15 a.m.
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[Discarded] SWIG/base: Ensure that ptrdiff_t is available for SWIG by including cstddef.
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gblack
|
November 27th, 2011, 2:16 a.m.
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[Submitted] SPARC: Isolate FP operations enough to prevent code/rounding mode reordering.
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gblack
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November 27th, 2011, 2:16 a.m.
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[Submitted] Packet: Enable functional reads of partial data to packet class
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blakegw
|
November 28th, 2011, 9:01 a.m.
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[Discarded] MEM: Add the port proxies to the source tree
|
ahansson
|
November 28th, 2011, 10:14 a.m.
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[Discarded] MEM: TranslatingPorts are replaced with SETranslatingProxys
|
ahansson
|
November 28th, 2011, 10:16 a.m.
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[Discarded] MEM: Changes for SETranslatingProxy integration into Ruby
|
ahansson
|
November 28th, 2011, 10:19 a.m.
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[Discarded] MEM: VirtualPorts are replaced with FSTranslatingProxys
|
ahansson
|
November 28th, 2011, 10:20 a.m.
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[Discarded] MEM: FunctionalPorts are replaced with PortProxys
|
ahansson
|
November 28th, 2011, 10:22 a.m.
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[Submitted] sim_cur_ticks: display curTick in stats
|
ali
|
December 1st, 2011, 12:29 a.m.
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[Submitted] Base: Fixed shift amount in genrand() to work with large numbers
|
ali
|
December 1st, 2011, 12:29 a.m.
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[Submitted] O3: Add stat that counts committed macro-instructions
|
ali
|
December 1st, 2011, 12:36 a.m.
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[Submitted] SLICC: Use pointers for directory entries
|
nilay
|
December 5th, 2011, 1:58 a.m.
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[Submitted] Ruby: Resurrect Cache Warmup Capability
|
nilay
|
December 5th, 2011, 1:59 a.m.
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[Submitted] Big squashed diff of changes that merge SE and FS modes.
|
gblack
|
December 8th, 2011, 11:04 p.m.
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[Submitted] BPred: Fix RAS to handle predicated call/return instructions.
|
ali
|
December 13th, 2011, 10:01 a.m.
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[Submitted] config: support outputing a pickle of the configuration tree
|
ali
|
December 16th, 2011, 1:30 p.m.
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[Submitted] O3: Remove some asserts that no longer seem to be valid.
|
ali
|
December 16th, 2011, 1:30 p.m.
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[Submitted] WorkItems: Enables run time sampling for code marked using pseudo insts.
|
ali
|
December 16th, 2011, 1:31 p.m.
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[Submitted] ARM: Add support for initparam m5 op
|
ali
|
December 16th, 2011, 1:31 p.m.
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[Submitted] ARM: Add support for running multiple systems
|
ali
|
December 16th, 2011, 1:31 p.m.
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[Submitted] O3: Add support of function tracing with O3 CPU.
|
ali
|
December 16th, 2011, 1:31 p.m.
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[Submitted] Mem: Add simple bandwidth stats to PhysicalMemory
|
ali
|
December 16th, 2011, 1:32 p.m.
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[Submitted] Bus: Simulation fatals instead of segfault when the destination port is NULL.
|
ali
|
December 16th, 2011, 1:32 p.m.
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[Submitted] mem: Change DPRINTF prints more useful destination port number.
|
ali
|
December 16th, 2011, 1:32 p.m.
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[Submitted] MAC: Make gem5 compile and run on MacOSX 10.7.2
|
ahansson
|
December 19th, 2011, 5:50 a.m.
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[Submitted] SWIG: Make gem5 compile and link with swig 2.0.4
|
ahansson
|
December 19th, 2011, 5:51 a.m.
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[Submitted] MEM: Add the system port as a central access point
|
ahansson
|
December 19th, 2011, 5:52 a.m.
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[Submitted] MEM: Add port proxies instead of non-structural ports
|
ahansson
|
December 19th, 2011, 5:53 a.m.
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[Submitted] CPU: Moving towards a more general port across CPU models
|
ahansson
|
December 19th, 2011, 5:54 a.m.
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[Submitted] MEM: Simplify ports by removing EventManager
|
ahansson
|
December 19th, 2011, 5:55 a.m.
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[Submitted] MEM: Remove the notion of the default port
|
ahansson
|
December 19th, 2011, 5:56 a.m.
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[Submitted] MEM: Remove Port removeConn and MemObject deletePortRefs
|
ahansson
|
December 19th, 2011, 5:57 a.m.
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[Submitted] MEM: Separate queries for snooping and address ranges
|
ahansson
|
December 19th, 2011, 5:58 a.m.
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[Submitted] MEM: Remove the functional ports from the memory system
|
ahansson
|
December 19th, 2011, 6 a.m.
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[Submitted] Alpha specific alignment of PC
|
ah
|
December 21st, 2011, 12:15 a.m.
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[Submitted] MEM: Make the bus bridge unidirectional and fixed address range
|
ahansson
|
December 23rd, 2011, 1:32 a.m.
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