Review Board 2.0.15


Review requests for Default

Summary Submitter
Posted Last Updated
Tracks if the RAS has been pushed or not during prediction to pop the RAS if neccessary during squash
npremill
June 11th, 2012, 7:44 a.m.
unittest: Fix build errors
olajep
December 28th, 2013, 6:43 p.m.
sim: eventq: Initialize _curEventQueue to dummy queue
olajep
December 28th, 2013, 7:32 p.m.
[Discarded] sim: core: add setCurTick() function
olajep
December 28th, 2013, 7:37 p.m.
[Discarded] mem: Add HMC Timing Paramters
onaji
April 28th, 2015, 2:04 p.m.
network: DSENT power model
owenhsin
April 9th, 2013, 7:25 p.m.
[Discarded] network: DSENT power model
owenhsin
December 4th, 2012, 11:27 p.m.
sparc: Make remote debugging with gdb work
palle
November 7th, 2015, 9:22 p.m.
sparc: makeSparcSystem() in configs/common/FSConfig.py is missing the cmdLine parameter
palle
October 30th, 2015, 9:20 p.m.
sparc: writing to tick_cmpr should not cause a panic
palle
September 13th, 2015, 7:14 p.m.
Build on NetBSD
palle
August 17th, 2012, 10:35 a.m.
cpu: fix unitialized variable which may cause assertion failure
pcabre
December 4th, 2015, 11:11 a.m.
mem, stats: fix typos in CommMonitor and Stats
peneau
February 3rd, 2017, 9:34 a.m.
mem, misc: fix building issue with CommMonitor (unused variables)
peneau
February 3rd, 2017, 8:37 a.m.
[Discarded] misc: Appease clang-3.4.1
peneau
April 26th, 2016, 5:37 p.m.
Adding some new options to support TRIPS ISA
pengfeidaxia
April 28th, 2010, 5:39 p.m.
Make TRIPS binaries available
pengfeidaxia
April 28th, 2010, 6:37 p.m.
ISA description files for TRIPS ISA
pengfeidaxia
April 28th, 2010, 6:29 p.m.
Adding a cpu model named simpleEdgeCPU into M5
pengfeidaxia
April 28th, 2010, 5:58 p.m.
mem: restore address if AddrMapper cannot send request
pfister
May 30th, 2015, 11:58 a.m.
misc: Add a CONTRIBUTING document
powerjg
February 16th, 2017, 4:54 p.m.
misc: Update #!env calls for python to explicit version
powerjg
January 26th, 2017, 4:47 p.m.
x86: Fix implicit stack addressing in 64-bit mode
powerjg
January 26th, 2017, 4:51 p.m.
misc: Add Python.h header to pyevents.hh
powerjg
January 27th, 2017, 5:32 p.m.
cpu: Remove branch predictor function predictInOrder
powerjg
November 23rd, 2016, 4:10 p.m.
stats: Add more information to uninitialized error
powerjg
October 11th, 2016, 2:45 p.m.
style: Make the style fixers safe
powerjg
July 1st, 2016, 4:40 p.m.
cpu, x86: Allow the TLB to be warmed up before CPU switch
powerjg
May 20th, 2016, 10:09 p.m.
sim: Fix fork for multithreaded simulations
powerjg
May 20th, 2016, 10:11 p.m.
tests: Add tests for the Learning gem5 scripts
powerjg
July 16th, 2015, 2:12 p.m.
config: Add configs scripts used in Learning gem5
powerjg
July 16th, 2015, 2:12 p.m.
Ruby: Remove assert in RubyPort retry list logic
powerjg
June 23rd, 2015, 9:52 p.m.
Ruby: Update backing store option to propagate through to all RubyPorts
powerjg
February 4th, 2015, 11:31 p.m.
[Discarded] Ruby: Fix a bug when issuing unaligned writes to memory
powerjg
February 9th, 2015, 8:23 p.m.
[Discarded] mem: Fix race condition in crossbar routing table
powerjg
January 26th, 2015, 8:28 p.m.
Ruby: Fix hard-coded block size assumption for multiple directories
powerjg
August 22nd, 2012, 9:32 a.m.
Ruby: Add field to slicc machine for generic type
powerjg
July 14th, 2012, 8:44 a.m.
[Discarded] Ruby: Change DataBlock status to allocated after assigning an allocated pointer
powerjg
August 22nd, 2012, 9:14 a.m.
Ruby: Modify Scons so that we can put .sm files in extras
powerjg
July 14th, 2012, 8:43 a.m.
Ruby: Clean up topology changes
powerjg
July 14th, 2012, 8:44 a.m.
Ruby: Add RubySystem parameter to MemoryControl SimObject to guarantee that RubySystem is created first.
powerjg
August 2nd, 2012, 7:44 a.m.
Ruby: add assert for bad element in netdest
powerjg
July 14th, 2012, 8:44 a.m.
Adding TSX support to gem5
pradip16
July 5th, 2014, 3:10 a.m.
[Discarded] Inorder: 9 stage pipeline modifications
pritha
March 7th, 2012, 10:58 a.m.
IGbE: Fix writeback conditions for i8254x GbE in updated data sheet
pritha
March 3rd, 2012, 12:31 p.m.
misc: Add support for switching multiple cores in SystemC
prosenfeld
March 4th, 2016, 11:28 p.m.
configs: add command-line option to enable NoMali in fs.py
prosenfeld
January 19th, 2016, 12:10 a.m.
Ruby: Initialize MessageSizeType of SequencerMsg to Request_Control
puthoorsooraj
November 18th, 2016, 10:20 p.m.
syscall_emul: implement newfstatat, mbind and faccessat syscall
puthoorsooraj
May 5th, 2016, 6:22 p.m.
A more realistic configuration of an ARM-like processor
rdreslin
January 11th, 2012, 2:41 p.m.
« < 57 58 59 60 61 62 63 > » 65 pages