|
|
[Submitted] MEM: Split SimpleTimingPort into PacketQueue and ports
|
ahansson
|
February 27th, 2012, 2:29 a.m.
|
|
|
|
[Submitted] MEM: Unify bus access methods and prepare for master/slave split
|
ahansson
|
February 29th, 2012, 3:06 a.m.
|
|
|
|
[Submitted] Power: Change bitfield name to avoid conflicts with range_map
|
ahansson
|
March 21st, 2012, 10:03 a.m.
|
|
|
|
[Submitted] range_map: Enable const find and iteration
|
ahansson
|
March 21st, 2012, 10:06 a.m.
|
|
|
|
[Submitted] CPU: Unify initMemProxies across CPUs and simulation modes
|
ahansson
|
March 27th, 2012, 3:55 a.m.
|
|
|
|
[Submitted] MEM: Introduce the master/slave port sub-classes in C++
|
ahansson
|
March 10th, 2012, 11:54 a.m.
|
|
|
|
[Submitted] Ruby: Remove the physMemPort and instead access memory directly
|
ahansson
|
March 20th, 2012, 8:31 a.m.
|
|
|
|
[Submitted] MEM: Remove legacy DRAM in preparation for memory updates
|
ahansson
|
March 21st, 2012, 10:04 a.m.
|
|
|
|
[Submitted] Atomic: Remove the physmem_port and access memory directly
|
ahansson
|
March 20th, 2012, 10:30 a.m.
|
|
|
|
[Submitted] Ruby: Fix the example configurations option parsing
|
ahansson
|
April 4th, 2012, 3:44 p.m.
|
|
|
|
[Submitted] Python: Make the All proxy traverse SimObject children as well
|
ahansson
|
March 21st, 2012, 10:07 a.m.
|
|
|
|
[Submitted] MEM: Enable multiple distributed generalized memories
|
ahansson
|
March 21st, 2012, 4:20 p.m.
|
|
|
|
[Submitted] Ruby: Ensure order-dependent iteration uses an ordered map
|
ahansson
|
April 10th, 2012, 10:18 a.m.
|
|
|
|
[Submitted] clang/gcc: Fix compilation issues with clang 3.0 and gcc 4.6
|
ahansson
|
April 2nd, 2012, 12:41 p.m.
|
|
|
|
[Submitted] Regression: Add ANSI colours to highlight test status
|
ahansson
|
April 6th, 2012, 9:16 a.m.
|
|
|
|
[Submitted] MEM: Separate snoops and normal memory requests/responses
|
ahansson
|
April 2nd, 2012, 6:49 a.m.
|
|
|
|
[Submitted] MEM: Remove the Broadcast destination from the packet
|
ahansson
|
April 4th, 2012, 12:52 a.m.
|
|
|
|
[Submitted] Ruby: Use MasterPort base-class pointers where possible
|
ahansson
|
April 4th, 2012, 10:22 a.m.
|
|
|
|
[Submitted] clang/gcc: Use STL hash function for int64_t and uint64_t
|
ahansson
|
April 18th, 2012, 9:52 p.m.
|
|
|
|
[Submitted] MEM: Add the PortId type and a corresponding id field to Port
|
ahansson
|
April 7th, 2012, 9:51 a.m.
|
|
|
|
[Submitted] MEM: Use base class Master/SlavePort pointers in the bus
|
ahansson
|
April 9th, 2012, 9:40 a.m.
|
|
|
|
[Submitted] MEM: Separate requests and responses for timing accesses
|
ahansson
|
April 11th, 2012, 8:23 a.m.
|
|
|
|
[Submitted] Ruby: Ensure snoop requests are sent using sendTimingSnoopReq
|
ahansson
|
May 3rd, 2012, 11:22 a.m.
|
|
|
|
[Submitted] MEM: Do not forward uncacheable to bus snoopers
|
ahansson
|
May 4th, 2012, 9:47 a.m.
|
|
|
|
[Submitted] MEM: Add the communication monitor
|
ahansson
|
April 20th, 2012, 11:23 a.m.
|
|
|
|
[Discarded] Cache: Remove redundant check for uncacheable snoops
|
ahansson
|
May 18th, 2012, 9:12 a.m.
|
|
|
|
[Submitted] Config: Exit with fatal if a port is already connected
|
ahansson
|
May 18th, 2012, 9:10 a.m.
|
|
|
|
[Submitted] MEM: Add a snooping DMA port subclass for table walker
|
ahansson
|
May 17th, 2012, 5:05 a.m.
|
|
|
|
[Submitted] DMA: Split the DMA device and IO device into seperate files
|
ahansson
|
May 18th, 2012, 5:08 a.m.
|
|
|
|
[Submitted] Config: Use the attribute naming and include ports in JSON
|
ahansson
|
May 16th, 2012, 7:41 a.m.
|
|
|
|
[Submitted] Packet: Cleaning up packet command and attribute
|
ahansson
|
May 2nd, 2012, 7:14 a.m.
|
|
|
|
[Submitted] Cache: Remove dangling doWriteback declaration
|
ahansson
|
May 23rd, 2012, 6:30 a.m.
|
|
|
|
[Submitted] Bridge: Split deferred request, response and sender state
|
ahansson
|
May 23rd, 2012, 6:31 a.m.
|
|
|
|
[Submitted] Packet: Updated comments for src and dest fields
|
ahansson
|
May 23rd, 2012, 6:32 a.m.
|
|
|
|
[Submitted] Packet: Unify the use of PortID in packet and port
|
ahansson
|
May 23rd, 2012, 6:32 a.m.
|
|
|
|
[Submitted] Bus: Turn the PortId into a transport function parameter
|
ahansson
|
May 23rd, 2012, 6:34 a.m.
|
|
|
|
[Submitted] Bus: Remove redundant packet parameter from isOccupied
|
ahansson
|
May 25th, 2012, 9:47 a.m.
|
|
|
|
[Submitted] gcc: Small fixes to compile with gcc 4.7
|
ahansson
|
May 29th, 2012, 8:54 a.m.
|
|
|
|
[Submitted] Bus: Split the bus into a non-coherent and coherent bus
|
ahansson
|
May 25th, 2012, 9:47 a.m.
|
|
|
|
[Submitted] Power: Fix MaxMiscDestRegs which was set to zero
|
ahansson
|
June 8th, 2012, 2:54 a.m.
|
|
|
|
[Submitted] Timing CPU: Remove a redundant port pointer
|
ahansson
|
June 6th, 2012, 9:43 a.m.
|
|
|
|
[Submitted] swig: Use SWIG from environment when determining version
|
ahansson
|
June 20th, 2012, 4:32 p.m.
|
|
|
|
[Discarded] gcc: Fix memset warnings concerning constant zero length
|
ahansson
|
June 27th, 2012, 10:34 a.m.
|
|
|
|
[Submitted] gcc: Fix warnings for gcc 4.7 and clang 3.1
|
ahansson
|
June 27th, 2012, 10:36 a.m.
|
|
|
|
[Submitted] EventManager: Rename queue accessor and remove cast operator
|
ahansson
|
July 6th, 2012, 6:37 a.m.
|
|
|
|
[Submitted] Fix: Address a few benign memory leaks
|
ahansson
|
July 6th, 2012, 12:18 a.m.
|
|
|
|
[Submitted] Mem: Make members relating to range and size constant
|
ahansson
|
July 6th, 2012, 6:33 a.m.
|
|
|
|
[Submitted] Port: Hide the queue implementation in SimpleTimingPort
|
ahansson
|
July 6th, 2012, 6:31 a.m.
|
|
|
|
[Submitted] Port: Align port names in C++ and Python
|
ahansson
|
June 11th, 2012, 7:46 a.m.
|
|
|
|
[Submitted] Bus: Make the default bus width 8 bytes instead of 64
|
ahansson
|
June 11th, 2012, 7:44 a.m.
|
|