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[Submitted] style: move style verifiers into classes
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nate
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April 13th, 2011, 9:46 a.m.
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[Submitted] style: add a user interface wrapper class
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nate
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April 13th, 2011, 9:46 a.m.
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[Submitted] region: add a utility class for keeping track of regions of some range
|
nate
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April 13th, 2011, 9:45 a.m.
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[Submitted] SortedDict: add functions for getting ranges of keys, values, items
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nate
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April 13th, 2011, 9:45 a.m.
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[Submitted] python: figure out if the m5.internal package exists even with demandimport
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nate
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April 13th, 2011, 9:45 a.m.
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[Submitted] Cache warmup: fixed compile errors in Brad's cache warmup patches
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somayeh
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April 11th, 2011, noon
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[Submitted] Core: Add some documentation about the sim clocks.
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ali
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April 10th, 2011, 4:49 p.m.
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[Submitted] ruby: dbg: use system ticks instead of cycles
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ksewell
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April 5th, 2011, 11:18 a.m.
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[Submitted] ARM: Make GIC handle IPIs and multiple processors.
|
ali
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April 4th, 2011, 9:51 a.m.
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[Submitted] ARM: Add snoop control unit device.
|
ali
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April 4th, 2011, 9:50 a.m.
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[Discarded] VNC: Add support for capturing frame buffer to file each time it is changed.
|
ali
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April 4th, 2011, 9:48 a.m.
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[Submitted] Ruby: Simplify SLICC and Entry/TBE handling.
|
hsul
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March 31st, 2011, 2:21 p.m.
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[Submitted] CacheMemory: add allocateVoid() that is == allocate() but no return value.
|
hsul
|
March 31st, 2011, 12:19 p.m.
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[Discarded] Ruby: Simplify SLICC and Entry/TBE handling.
|
hsul
|
March 31st, 2011, 12:18 p.m.
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[Submitted] Ruby: Add new object called WireBuffer to mimic a Wire.
|
hsul
|
March 31st, 2011, 12:18 p.m.
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[Submitted] Ruby: have the rubytester pass contextId to Ruby.
|
hsul
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March 31st, 2011, 12:17 p.m.
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[Submitted] Ruby: enable multiple sequencers in one controller.
|
hsul
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March 31st, 2011, 12:17 p.m.
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[Submitted] Ruby: pass Packet->Req->contextId() to Ruby.
|
hsul
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March 31st, 2011, 12:15 p.m.
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[Submitted] ARM: Fix checkpoint restoration into O3 CPU and the way O3 switchCpu works.
|
ali
|
March 30th, 2011, 2:52 p.m.
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[Submitted] ARM: Fix bug in MicroLdrNeon templates for initiateAcc().
|
ali
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March 30th, 2011, 2:51 p.m.
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[Submitted] ARM: Fix m5op parameters bug.
|
ali
|
March 30th, 2011, 2:49 p.m.
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[Submitted] ARM: Fix table walk going on while ASID changes error
|
ali
|
March 30th, 2011, 9:03 a.m.
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[Submitted] ARM: Cleanup implementation of ITSTATE and put important code in PCState.
|
ali
|
March 30th, 2011, 9:02 a.m.
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[Submitted] ARM: Tag appropriate instructions as IsReturn
|
ali
|
March 30th, 2011, 8:55 a.m.
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[Submitted] CPU: Remove references to memory copy operations
|
ali
|
March 30th, 2011, 8:52 a.m.
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[Submitted] Ruby: Add support for functional accesses
|
nilay
|
March 29th, 2011, 2:53 p.m.
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[Submitted] Add the user settable separator string for arrayed stats, default is standard ::
|
bdanofsky
|
March 29th, 2011, 7:09 a.m.
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[Submitted] config: revamp x86 config to avoid appending to SimObjectVectors
|
stever
|
March 26th, 2011, 12:17 p.m.
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[Submitted] sim: reinstate implicit parenting on parameter assignment
|
stever
|
March 26th, 2011, 12:17 p.m.
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[Submitted] Add the ability to have the build directory live under the EXTRAS directory
|
bdanofsky
|
March 25th, 2011, 8:53 a.m.
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[Submitted] scons: allow use of current builds as default build settings
|
stever
|
March 24th, 2011, 4:56 p.m.
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[Submitted] scons: interpret paths relative to launch directory
|
stever
|
March 24th, 2011, 8:09 a.m.
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[Submitted] sim: typecast Tick to UTick for eventQ assert
|
ksewell
|
March 20th, 2011, 6:11 p.m.
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[Submitted] Ruby: Convert CacheRequestType to RubyRequestType
|
nilay
|
March 18th, 2011, 9:54 p.m.
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[Submitted] Ruby: Convert AccessModeType to RubyAccessMode
|
nilay
|
March 18th, 2011, 9:53 p.m.
|
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[Submitted] configs: combine ruby_se.py and se.py to avoid all that code duplication
|
hsul
|
March 18th, 2011, 4:05 p.m.
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[Submitted] enable x86 workloads on se.py
|
hsul
|
March 18th, 2011, 4:01 p.m.
|
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[Submitted] se.py: Modify script to make multiprogramming much easier.
|
hsul
|
March 18th, 2011, 4:01 p.m.
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[Submitted] swig: get rid of m5.internal.random module (swig/random.i)
|
stever
|
March 17th, 2011, 5:38 p.m.
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X86: fnstsw: Another patch from Vince Weaver
|
hsul
|
March 17th, 2011, 4 p.m.
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[Submitted] X86: fsincos: Another patch from Vince Weaver
|
hsul
|
March 17th, 2011, 4 p.m.
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[Submitted] X86: haddps: Another patch from Vince Weaver
|
hsul
|
March 17th, 2011, 4 p.m.
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X86: rlimit: Another patch from Vince Weaver
|
hsul
|
March 17th, 2011, 3:59 p.m.
|
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[Submitted] X86: open flags: Another patch from Vince Weaver
|
hsul
|
March 17th, 2011, 3:59 p.m.
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X86 ioctl: Another patch from Vince Weaver
|
hsul
|
March 17th, 2011, 3:58 p.m.
|
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[Submitted] patch from Vince Weaver for review
|
hsul
|
March 17th, 2011, 3:57 p.m.
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[Submitted] ISA parser: Set up op_src_decl and op_dest_decl for pc operands.
|
gblack
|
March 17th, 2011, 2:50 p.m.
|
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[Submitted] base: disable FastAlloc in debug builds by default
|
stever
|
March 16th, 2011, 10:55 a.m.
|
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[Submitted] This patch makes garnet use the info about active and inactive vnets during allocation and power estimations etc
|
tushar
|
March 15th, 2011, 1:16 a.m.
|
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[Submitted] fix garnet flexible pipeline
|
tushar
|
March 15th, 2011, 1:16 a.m.
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