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[Submitted] Power: Fix MaxMiscDestRegs which was set to zero
|
ahansson
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June 8th, 2012, 2:54 a.m.
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[Submitted] Bus: Split the bus into a non-coherent and coherent bus
|
ahansson
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May 25th, 2012, 9:47 a.m.
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[Submitted] gcc: Small fixes to compile with gcc 4.7
|
ahansson
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May 29th, 2012, 8:54 a.m.
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[Submitted] Bus: Remove redundant packet parameter from isOccupied
|
ahansson
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May 25th, 2012, 9:47 a.m.
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[Submitted] Bus: Turn the PortId into a transport function parameter
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ahansson
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May 23rd, 2012, 6:34 a.m.
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[Submitted] Packet: Unify the use of PortID in packet and port
|
ahansson
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May 23rd, 2012, 6:32 a.m.
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[Submitted] Packet: Updated comments for src and dest fields
|
ahansson
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May 23rd, 2012, 6:32 a.m.
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[Submitted] Bridge: Split deferred request, response and sender state
|
ahansson
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May 23rd, 2012, 6:31 a.m.
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[Submitted] Cache: Remove dangling doWriteback declaration
|
ahansson
|
May 23rd, 2012, 6:30 a.m.
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[Submitted] Packet: Cleaning up packet command and attribute
|
ahansson
|
May 2nd, 2012, 7:14 a.m.
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[Submitted] Config: Use the attribute naming and include ports in JSON
|
ahansson
|
May 16th, 2012, 7:41 a.m.
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[Submitted] DMA: Split the DMA device and IO device into seperate files
|
ahansson
|
May 18th, 2012, 5:08 a.m.
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[Submitted] MEM: Add a snooping DMA port subclass for table walker
|
ahansson
|
May 17th, 2012, 5:05 a.m.
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[Submitted] Config: Exit with fatal if a port is already connected
|
ahansson
|
May 18th, 2012, 9:10 a.m.
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[Discarded] Cache: Remove redundant check for uncacheable snoops
|
ahansson
|
May 18th, 2012, 9:12 a.m.
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[Submitted] MEM: Add the communication monitor
|
ahansson
|
April 20th, 2012, 11:23 a.m.
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[Submitted] MEM: Do not forward uncacheable to bus snoopers
|
ahansson
|
May 4th, 2012, 9:47 a.m.
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[Submitted] Ruby: Ensure snoop requests are sent using sendTimingSnoopReq
|
ahansson
|
May 3rd, 2012, 11:22 a.m.
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[Submitted] MEM: Separate requests and responses for timing accesses
|
ahansson
|
April 11th, 2012, 8:23 a.m.
|
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[Submitted] MEM: Use base class Master/SlavePort pointers in the bus
|
ahansson
|
April 9th, 2012, 9:40 a.m.
|
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[Submitted] MEM: Add the PortId type and a corresponding id field to Port
|
ahansson
|
April 7th, 2012, 9:51 a.m.
|
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[Submitted] clang/gcc: Use STL hash function for int64_t and uint64_t
|
ahansson
|
April 18th, 2012, 9:52 p.m.
|
|
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[Submitted] Ruby: Use MasterPort base-class pointers where possible
|
ahansson
|
April 4th, 2012, 10:22 a.m.
|
|
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[Submitted] MEM: Remove the Broadcast destination from the packet
|
ahansson
|
April 4th, 2012, 12:52 a.m.
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[Submitted] MEM: Separate snoops and normal memory requests/responses
|
ahansson
|
April 2nd, 2012, 6:49 a.m.
|
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[Submitted] Regression: Add ANSI colours to highlight test status
|
ahansson
|
April 6th, 2012, 9:16 a.m.
|
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[Submitted] clang/gcc: Fix compilation issues with clang 3.0 and gcc 4.6
|
ahansson
|
April 2nd, 2012, 12:41 p.m.
|
|
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[Submitted] Ruby: Ensure order-dependent iteration uses an ordered map
|
ahansson
|
April 10th, 2012, 10:18 a.m.
|
|
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[Submitted] MEM: Enable multiple distributed generalized memories
|
ahansson
|
March 21st, 2012, 4:20 p.m.
|
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[Submitted] Python: Make the All proxy traverse SimObject children as well
|
ahansson
|
March 21st, 2012, 10:07 a.m.
|
|
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[Submitted] Ruby: Fix the example configurations option parsing
|
ahansson
|
April 4th, 2012, 3:44 p.m.
|
|
|
|
[Submitted] Atomic: Remove the physmem_port and access memory directly
|
ahansson
|
March 20th, 2012, 10:30 a.m.
|
|
|
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[Submitted] MEM: Remove legacy DRAM in preparation for memory updates
|
ahansson
|
March 21st, 2012, 10:04 a.m.
|
|
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[Submitted] Ruby: Remove the physMemPort and instead access memory directly
|
ahansson
|
March 20th, 2012, 8:31 a.m.
|
|
|
|
[Submitted] MEM: Introduce the master/slave port sub-classes in C++
|
ahansson
|
March 10th, 2012, 11:54 a.m.
|
|
|
|
[Submitted] CPU: Unify initMemProxies across CPUs and simulation modes
|
ahansson
|
March 27th, 2012, 3:55 a.m.
|
|
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|
[Submitted] range_map: Enable const find and iteration
|
ahansson
|
March 21st, 2012, 10:06 a.m.
|
|
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[Submitted] Power: Change bitfield name to avoid conflicts with range_map
|
ahansson
|
March 21st, 2012, 10:03 a.m.
|
|
|
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[Submitted] MEM: Unify bus access methods and prepare for master/slave split
|
ahansson
|
February 29th, 2012, 3:06 a.m.
|
|
|
|
[Submitted] MEM: Split SimpleTimingPort into PacketQueue and ports
|
ahansson
|
February 27th, 2012, 2:29 a.m.
|
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|
|
[Submitted] Scons: Remove Werror=False in SConscript files
|
ahansson
|
March 6th, 2012, 9:18 a.m.
|
|
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|
[Submitted] gcc: Clean-up of non-C++0x compliant code, first steps
|
ahansson
|
March 6th, 2012, 9:20 a.m.
|
|
|
|
[Submitted] clang: Fix recently introduced clang compilation errors
|
ahansson
|
March 6th, 2012, 9:19 a.m.
|
|
|
|
[Submitted] CPU: Check that the interrupt controller is created when needed
|
ahansson
|
March 2nd, 2012, 4:45 a.m.
|
|
|
|
[Submitted] Stats: Fix the realview regression stats after nvmem move
|
ahansson
|
March 2nd, 2012, 5:56 a.m.
|
|
|
|
[Submitted] Ruby: Rename RubyPort::sendTiming to avoid overriding base class
|
ahansson
|
March 2nd, 2012, 5:55 a.m.
|
|
|
|
[Discarded] CPU: Fix switching in of x86 CPU with interrupt and TLB ports
|
ahansson
|
February 24th, 2012, 10:32 a.m.
|
|
|
|
[Submitted] MEM: Make all the port proxy members const
|
ahansson
|
February 24th, 2012, 12:55 a.m.
|
|
|
|
[Submitted] SWIG: Ensure ptrdiff_t is a known type in gcc >= 4.6.1
|
ahansson
|
February 28th, 2012, 4:53 a.m.
|
|
|
|
[Submitted] MEM: Simplify cache ports preparing for master/slave split
|
ahansson
|
February 21st, 2012, 3:21 a.m.
|
|
