|
|
[Submitted] Mem: Fix issue with prefetches originating at non-L1 caches getting stale data
|
ali
|
July 13th, 2011, 7:54 a.m.
|
|
|
|
[Submitted] O3: Enable pipelining icache accesses in fetch stage
|
ali
|
June 16th, 2011, 1:10 p.m.
|
|
|
|
[Submitted] Branch predictor: Fixes the tournament branch predictor.
|
ali
|
June 16th, 2011, 1:10 p.m.
|
|
|
|
[Submitted] IO: Handle case where ISA Fake device is being used as a fake memory.
|
ali
|
June 16th, 2011, 1:10 p.m.
|
|
|
|
[Submitted] O3: Fix issue w/wbOutstading being decremented multiple times on blocked cache.
|
ali
|
May 16th, 2011, 2:35 p.m.
|
|
|
|
[Submitted] O3: Fix offset calculation into storeQueue buffer for store->load forwarding
|
ali
|
May 16th, 2011, 2:35 p.m.
|
|
|
|
[Submitted] O3: Fix issue with interrupts/faults occuring in the middle of a macro-op
|
ali
|
May 16th, 2011, 2:35 p.m.
|
|
|
|
[Submitted] O3: Fix an issue with a load & branch instruction and mem dep squashing
|
ali
|
May 4th, 2011, 6:37 p.m.
|
|
|
|
[Submitted] ARM: Construct the predicate test register for more instruction programatically.
|
ali
|
May 4th, 2011, 6:44 p.m.
|
|
|
|
[Submitted] ARM: Generate condition code setting code based on which codes are set.
|
ali
|
May 4th, 2011, 6:45 p.m.
|
|
|
|
[Submitted] Trace: Allow printing ASIDs and selectively tracing based on user/kernel code.
|
ali
|
May 4th, 2011, 6:38 p.m.
|
|
|
|
[Submitted] ARM: Break up condition codes into normal flags, saturation, and simd.
|
ali
|
May 4th, 2011, 6:39 p.m.
|
|
|
|
[Submitted] ARM: Remove the saturating (Q) condition code from the renamed register.
|
ali
|
May 4th, 2011, 6:40 p.m.
|
|
|
|
[Submitted] ARM: Further break up condition code into NZ, C, V bits.
|
ali
|
May 4th, 2011, 6:43 p.m.
|
|
|
|
[Discarded] Main: Create long talked about output-conference-paper option.
|
ali
|
February 26th, 2011, 2:15 p.m.
|
|
|
|
[Discarded] Added simple sparese memory implementation.
|
ali
|
February 11th, 2011, 4:32 p.m.
|
|
|
|
[Submitted] ARM: Add snoop control unit device.
|
ali
|
April 4th, 2011, 9:50 a.m.
|
|
|
|
[Submitted] Core: Add some documentation about the sim clocks.
|
ali
|
April 10th, 2011, 4:49 p.m.
|
|
|
|
[Submitted] ARM: Make GIC handle IPIs and multiple processors.
|
ali
|
April 4th, 2011, 9:51 a.m.
|
|
|
|
[Submitted] Debug: Add a function to cause the simulator to create a checkpoint from GDB.
|
ali
|
May 2nd, 2011, 3:22 p.m.
|
|
|
|
[Submitted] ARM: Add vfpv3 support to native trace.
|
ali
|
May 2nd, 2011, 3:19 p.m.
|
|
|
|
[Submitted] CPU: Add some useful debug message to the timing simple cpu.
|
ali
|
May 2nd, 2011, 3:21 p.m.
|
|
|
|
[Submitted] CPU: Fix a case where timing simple cpu faults can nest.
|
ali
|
May 2nd, 2011, 3:20 p.m.
|
|
|
|
[Submitted] ARM: Fix checkpoint restoration into O3 CPU and the way O3 switchCpu works.
|
ali
|
March 30th, 2011, 2:52 p.m.
|
|
|
|
[Submitted] ARM: Fix bug in MicroLdrNeon templates for initiateAcc().
|
ali
|
March 30th, 2011, 2:51 p.m.
|
|
|
|
[Submitted] ARM: Fix m5op parameters bug.
|
ali
|
March 30th, 2011, 2:49 p.m.
|
|
|
|
[Submitted] ARM: Cleanup implementation of ITSTATE and put important code in PCState.
|
ali
|
March 30th, 2011, 9:02 a.m.
|
|
|
|
[Submitted] ARM: Fix table walk going on while ASID changes error
|
ali
|
March 30th, 2011, 9:03 a.m.
|
|
|
|
[Submitted] ARM: Tag appropriate instructions as IsReturn
|
ali
|
March 30th, 2011, 8:55 a.m.
|
|
|
|
[Submitted] O3: Tighten memory order violation checking to 16 bytes.
|
ali
|
February 27th, 2011, 6:50 p.m.
|
|
|
|
[Submitted] CPU: Remove references to memory copy operations
|
ali
|
March 30th, 2011, 8:52 a.m.
|
|
|
|
[Submitted] ARM: Fix rfe macroops.
|
ali
|
February 11th, 2011, 4:32 p.m.
|
|
|
|
[Submitted] ARM: Detect and skip udelay() functions in linux kernel.
|
ali
|
February 25th, 2011, 8:59 p.m.
|
|
|
|
[Submitted] Mem: Fix issue with dirty block being losted when entire block transfered to non-cache.
|
ali
|
February 25th, 2011, 8:57 p.m.
|
|
|
|
[Submitted] O3: Send instruction back to fetch on squash to seed predecoder correctly.
|
ali
|
February 25th, 2011, 8:58 p.m.
|
|
|
|
[Submitted] O3: Fix unaligned stores when cache blocked
|
ali
|
February 25th, 2011, 8:57 p.m.
|
|
|
|
[Submitted] O3: Cleanup the commitInfo comm struct.
|
ali
|
February 25th, 2011, 8:58 p.m.
|
|
|
|
[Submitted] ARM: Fix subtle bug in LDM.
|
ali
|
March 11th, 2011, 3:21 p.m.
|
|
|
|
[Submitted] Adds minimal ARM_SE support for m5threads.
|
ali
|
March 11th, 2011, 3:22 p.m.
|
|
|
|
[Submitted] ARM: Allow conditional quiesce instructions.
|
ali
|
March 11th, 2011, 3:15 p.m.
|
|
|
|
[Submitted] ARM: Identify branches as conditional or unconditional and direct or indirect.
|
ali
|
March 11th, 2011, 3:19 p.m.
|
|
|
|
[Submitted] SimpleCPU: Fix a case where a DTLB fault redirects fetch and an I-side walk occurs.
|
ali
|
January 18th, 2011, 2:33 p.m.
|
|
|
|
[Submitted] ARM: Reset m5 stats when program resets performance counters.
|
ali
|
February 11th, 2011, 4:34 p.m.
|
|
|
|
[Submitted] ARM: Unify creation of Linux and baremetal ARM systems into single function.
|
ali
|
February 11th, 2011, 4:36 p.m.
|
|
|
|
[Submitted] CLCD: Fix some serialization bugs with the clcd controller.
|
ali
|
February 11th, 2011, 4:37 p.m.
|
|
|
|
[Submitted] ARM: Delete OABI syscall handling.
|
ali
|
February 11th, 2011, 4:37 p.m.
|
|
|
|
[Submitted] M5: Don't include isa_traits.hh and use the TheISA namespace unless really needed.
|
ali
|
February 11th, 2011, 4:39 p.m.
|
|
|
|
[Submitted] ARM: Do something for ISB, DSB, DMB
|
ali
|
February 11th, 2011, 4:40 p.m.
|
|
|
|
[Submitted] ARM: Mark store conditionals as such.
|
ali
|
February 11th, 2011, 4:42 p.m.
|
|
|
|
[Submitted] O3: Fix bug when a squash occurs right before TLB miss returns.
|
ali
|
February 11th, 2011, 4:38 p.m.
|
|
