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[Submitted] slicc: support for arbitrary DPRINTF flags (not just RubySlicc)
|
atgutier
|
May 11th, 2015, 10:20 p.m.
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[Submitted] ruby: initalize replacement policies with their own simobjs
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atgutier
|
May 11th, 2015, 10:21 p.m.
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[Discarded] ruby: Changes to support finite buffering in ruby.
|
atgutier
|
May 11th, 2015, 10:21 p.m.
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[Submitted] ruby: expose access permission to replacement policies
|
atgutier
|
May 11th, 2015, 10:21 p.m.
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[Submitted] slicc: support for local variable declarations in action blocks
|
atgutier
|
May 11th, 2015, 10:21 p.m.
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[Discarded] slicc: support for null pointer assignment
|
atgutier
|
May 11th, 2015, 10:21 p.m.
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ruby: set default latency for ruby caches
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atgutier
|
May 11th, 2015, 10:21 p.m.
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[Submitted] ruby: speed up function used for cache walks
|
atgutier
|
May 11th, 2015, 10:21 p.m.
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[Submitted] slicc: support for multiple cache entry types in the same state machine
|
atgutier
|
May 11th, 2015, 10:21 p.m.
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[Submitted] ruby: improved stall and wait debugging
|
atgutier
|
May 11th, 2015, 10:22 p.m.
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[Submitted] ruby: Fix for stallAndWait bug
|
atgutier
|
May 11th, 2015, 10:22 p.m.
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[Discarded] O3 CPU: Adding thread specific wakeup functionality
|
atgutier
|
May 11th, 2015, 10:22 p.m.
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ruby: Fixed pipeline squashes caused by aliased requests
|
atgutier
|
May 11th, 2015, 10:22 p.m.
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cpu: Add store-access operations
|
atgutier
|
May 11th, 2015, 10:22 p.m.
|
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[Submitted] slicc: support for multiple message types on the same buffer
|
atgutier
|
May 11th, 2015, 10:22 p.m.
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[Submitted] slicc: improve support for prefix operations
|
atgutier
|
May 11th, 2015, 10:22 p.m.
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[Submitted] slicc: fix missing inline function in LocalVariableAST
|
atgutier
|
May 11th, 2015, 10:22 p.m.
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[Submitted] slicc: Fix bug in enqueue and peek statements.
|
atgutier
|
May 11th, 2015, 10:22 p.m.
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[Submitted] ruby: give access to cache tag/data latencies from SLICC
|
atgutier
|
May 11th, 2015, 10:22 p.m.
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[Submitted] config: add base class for ruby controllers
|
atgutier
|
May 11th, 2015, 10:23 p.m.
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[Submitted] slicc: support for transitions with a wildcard next state
|
atgutier
|
May 11th, 2015, 10:23 p.m.
|
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[Submitted] ruby: allocate a block in CacheMemory without updating LRU state
|
atgutier
|
May 11th, 2015, 10:23 p.m.
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[Discarded] base: add generic bitset class that can be sized dynamically
|
atgutier
|
May 11th, 2015, 10:23 p.m.
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[Submitted] slicc: improved stalling support in protocols
|
atgutier
|
May 11th, 2015, 10:23 p.m.
|
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[Submitted] multi-gem5: add support for multi gem5 runs
|
cdunham
|
May 15th, 2015, 10:18 p.m.
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[Submitted] x86: decode instructions with vex prefix
|
nilay
|
May 17th, 2015, 9:55 p.m.
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[Submitted] cpu: implements vector registers
|
nilay
|
May 17th, 2015, 9:56 p.m.
|
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[Submitted] kvm, arm: Move ARM-specific files to arch/arm/kvm/
|
andysan
|
May 18th, 2015, 12:24 p.m.
|
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[Submitted] kvm, arm, dev: Add an in-kernel GIC implementation
|
andysan
|
May 18th, 2015, 12:29 p.m.
|
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[Submitted] kvm: Handle inst events at the current instruction count
|
andysan
|
May 18th, 2015, 12:31 p.m.
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[Submitted] kvm, arm: Add support for aarch64
|
andysan
|
May 18th, 2015, 12:35 p.m.
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[Submitted] ruby: Fix MESI consistency bug
|
melver
|
May 21st, 2015, 1:58 p.m.
|
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[Submitted] ruby: Remove the RubyCache/CacheMemory latency
|
jthestness
|
May 21st, 2015, 4:05 p.m.
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ruby: Add ReadRespWithInvalidate support, fixes MESI consistency bug
|
melver
|
May 21st, 2015, 7:27 p.m.
|
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[Submitted] ruby: Expose MessageBuffers as SimObjects
|
jthestness
|
May 25th, 2015, 11:51 p.m.
|
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[Submitted] ruby: Protocol changes for SimObject MessageBuffers
|
jthestness
|
May 25th, 2015, 11:52 p.m.
|
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cpu: o3: Merging haltContext with suspendContext
|
alexdutu
|
May 26th, 2015, 4:45 p.m.
|
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[Submitted] ruby: change advance_stage for flit_d
|
atgutier
|
May 27th, 2015, 4:48 p.m.
|
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[Submitted] sim, arm: add checkpoint upgrader for d02b45a5
|
cdunham
|
May 27th, 2015, 10:18 p.m.
|
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config, SMT: Enabling SMT for multi-threaded programs
|
alexdutu
|
May 28th, 2015, 3:36 p.m.
|
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cpu: o3: Mapping the ZeroRegister for all hardware threads
|
alexdutu
|
May 28th, 2015, 3:38 p.m.
|
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x86, o3: Enabling x86 TLBs for multiple hardware threads
|
alexdutu
|
May 28th, 2015, 3:38 p.m.
|
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|
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[Discarded] x86, o3: Enabling x86 TLBs for multiple hardware threads
|
alexdutu
|
May 28th, 2015, 3:38 p.m.
|
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cpu: o3: Fetch stage updates for hw threads priority list
|
alexdutu
|
May 28th, 2015, 3:39 p.m.
|
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cpu: o3: Commit stage updates for hw threads priority list
|
alexdutu
|
May 28th, 2015, 3:40 p.m.
|
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|
cpu: Adding AddressMonitor structs for every hardware thread
|
alexdutu
|
May 28th, 2015, 3:40 p.m.
|
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cpu, o3: Checking AddressMonitor structures on every store for SMT
|
alexdutu
|
May 28th, 2015, 3:40 p.m.
|
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|
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cpu, o3: Remove assertion on buffer from rename being empty
|
alexdutu
|
May 28th, 2015, 3:41 p.m.
|
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|
x86: Mwait reimplementation
|
alexdutu
|
May 28th, 2015, 3:41 p.m.
|
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[Submitted] sim: Refactor the serialization base class
|
andysan
|
May 28th, 2015, 5:35 p.m.
|
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